Daewoo DVD-T6300N, Service Manual

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Component Descriptions
Pin Description Table (continued)
Pin Name Pin No. Type Description
Host Interface Pins
XHCS1J 94 I This pin is used to select the command block task file registers
XHCS3J 93 I This pin is used to select the control block task file registers.
XHIORJ 103 I Asserted by the host during a host I/O read operation
XHIOWJ 104 I Asserted by the host during a host I/O write operation
XHDRQ 105 O
1. DMA request. This pin is configured as the DMA request signal, and
is used during DMA transfer between the host and the controller.
This pin is tri-stated when DMA transfers are not enabled.
2. MPEG acknowledge. This pin is used as the ACK signal when
MPEG interface mode is selected.
XHDACKJ 101 I
1. DMA acknowledge. This pin is configured as DACKJ, and is used
as the DMA acknowledge signal during DMA data transfers.
MPEG request. This pin is used as the REO signal when MPEG
interface mode is selected.
XHCS16J 99 O
1. 16-bit data select. This signal indicates that a 16-bit data transfer is
active on the host data bus. This pin is open-drain tri-state output
2. MPEG clock. This pin is used as the CLOCK signal when MPEG
interface mode is selected
XHINT 100 O
1. Host interrupt request. This tri-state pin is the host interrupt request,
and is asserted to indicated to the host that the controller needs
attention
2. MPEG begin. This pin is used as the BEGIN signal when MPEG
interface mode is selected
XHPDIAGJ 97 I/O
This pin is used as the Passed Diagnostics signal, and may be an input or
an open-drain output
XHPDSPJ 92 I/O
This pin is used as that Drive Active/Slave Present signal, and is an input or
an open-drain output. This pin is used for Master/Slave drive communication
for driving an LED.
XHORDY 102 O
1. I/O channel ready. This signal is driven how to extend host transfer
cycles when the controller is not ready to respond. This pin will be
tri-stated when a read or write is not to progress.
2. MPEG error. This pin is used as the ERROR signal when MPEG
when MPEG interface mode is selected.
XHA[2:0] 95,96,98 I
Host address lines. This host address lines A [2:0] are used to access the
various host control, status, and data registers.
XHD[15:0]
106,108,
111,113,
116,118,
120,122,
123,121,
119,117,
114,112,
109,107
I/O
1. Host data bus. This bus is used to transfer data and used status
between the host and the controller.
2. MPEG data 7.0 The HD[7:0]are used as the DATA[7:0] when MPEG
interface mode is selected.
3. VCD I/F Bit-3 are used as VCD I/F signal when VCD function is
enabled. The relationship of bit-3 and VCD I/F is as follow.
HD0 - CD_DATA
HD1 - CD_LRCK
HD2 - CD_BCK
HD3 – CD-C2PO
4. UDE I/F
HD8 – RXD
HD9 – TXD
HD10 – HRDYJ
HD11 - SRDYJ