10
T h is m icro -con tro lle r u ses a re fo rm e d m e m o ry inte rfa ce , e nsu rin g b o th low e r co sts a nd h ig h q u a lity.
T h e m e m o ry in te rfa ce co n tro l lo g ic is d e sig n ed p e rfe ctly a syn ch ro n ou sly to th e I/O co n tro l lo g ic.
A 3 2 -b it o r 1 6 -b it m e m o ry syste m can b e use d .
T h e D R A M co ntrolle r is d e sig n ed to drive e ven 4 -b a n k D R A M d ire ctly.
T h e D M A ch a n n el, in w hich 3 p ro g ra m s can b e op e ra te d, in clud e s im a ge , C R T a nd so u n d d a ta.
T h e re are 3 I/O cycle typ e s as fo llo w s:
S im ple I/O - fixe d 8 M H z tim in g
M o d u le I/O va riab le 8 M H z tim ing
P C b u s style I/O 3 2 -b it, 16 M H z tim in g
O the r c ha racte ristics a re th e A D c on ve rte r ch a n n el a n d tw o se ria l ke yb o ard m o u se p o rts.
ARM7500
Top View
Pin 240
Pin 181
Pin 120
Pin 61
Pin 60
Pin 12
1
Pin 1
Pin 1
80
Summary of Contents for DSN-300A
Page 5: ...4 3 BLOCK DIAGRAM...
Page 37: ...36 10 EXPLODED VIEW 10 1 DSN 300A...
Page 39: ...38 10 2 MODEL DSN 300S...
Page 42: ...41 11 SCHEMATIC DIAGRAM...
Page 43: ...42...
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