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CIRCUIT OPERATIONAL DESCRIPTION
3. MPEG Decoder
The signal read from DVD disc is output into the RF signal and Servo related signal through
the RF IC and they are input into the MPEG decoder and processed the MPEG decoding
and divided into video/audio signal. The video signal is output into the analog audio signal
through the built-in encoder block and also the audio signal into the audio DAC through the
audio decoder block.
MPEG decoder consists of existing MPEG-2 decoder and single chip combined the digital sig-
nal processing part which is the core technology of DVD player with the Servo controller.
) DVD Servo And MPEG-2 Decoder : S5L5008
SAMSUNG S5L5008 DVD SoC is designed to provide a cost-effective, low power size
and high performance DVD players solution for DVD-Video, DVD-Audio & many of CD
applications. To reduce total system cost, S5L5008 also providesthe following features:
a Optical RF,a front-end controller, a back-end decoder, a control CPU with separate
4KB Instruction and 4KB Data Cache, an improved audio DSP, a programmable video
encoder with a dual output capability of interlaced and progressive scan, Memory con-
troller, 4-channel Timers with PWM, I/O Ports, -channel 0-bit ADCsfor Servo control,
5-channel 0-bitVideo-DACs, -channel UART with handshake, IIC-BUS interface, IIS-
BUS interface, SIO, 6-in- Card Interface, SPDIF in/out, Audio PWM outand PLL for
clock generation.
The S5L5008 is fabricated in a standard 0.3um CMOS technology. Its low-power, sim-
ple, elegant and fully static design is particularly suitable for cost-sensitive and power-
sensitive applications.
The S5L5008 is built around the outstanding CPU core: The ARM946E-S cached pro-
cessor is a member of the ARM9 Thumb family of high-performance 32-bit system-on-
a-chip processor solutions. It provides a complete high performance CPU subsystem,
including ARM9TDMI RISC integer CPU, 4KB instruction/data caches, write buffer,
and protection unit, with an AMBA bus interface. The ARM9TDMI core within the
ARM946E-S executes both the 32-bit ARM and 6-bit Thumb instruction sets, allowing
the user to trade off between high performance and high code density. It is binary com-
patible with ARM7TDMI, ARM0TDMI, and StrongARM processors, and is supported by
a wide range of tools, operating systems, and application software.
Summary of Contents for DG-K301
Page 13: ...12 CIRCUIT OPERATIONAL DESCRIPTION 3 SDRAM MMSD416T216 O SDROM MMSD416T216 O Pin Assignments ...
Page 20: ...CIRCUIT DIAGRAM 19 2 DECODE BOARD SCHEMATIC DIAGRAM ...
Page 21: ...CIRCUIT DIAGRAM 20 ...
Page 22: ...CIRCUIT DIAGRAM 21 ...
Page 25: ...24 PCB CIRCUIT BOARD 1 POWER SUPPLY BOARD ...
Page 26: ...PCB CIRCUIT BOARD 25 2 DECODE BOARD ...
Page 27: ...PCB CIRCUIT BOARD 26 3 CONTROL BOARD 4 MICROPHONE BOARD ...
Page 28: ...27 WAVEFORMS 1 VIDEO IC100 S5L5008 85Pin DAC0 IC100 S5L5008 86Pin DAC1_PB ...
Page 29: ...WAVEFORMS 28 IC100 S5L5008 87Pin DAC2_Y IC100 S5L5008 90Pin DAC3_C ...
Page 30: ...WAVEFORMS 29 IC100 S5L5008 91Pin DAC4_CVBS 2 AUDIO C100 S5L5008 95Pin FR ...
Page 31: ...WAVEFORMS 30 IC100 S5L5008 96Pin FL IC100 S5L5008 108Pin SPDIF_R ...
Page 32: ...WAVEFORMS 31 3 SYSTEM WAVEFORMS CON1_4P IR CON1_6P DAIO ...
Page 33: ...WAVEFORMS 32 CON1_7P CLK CON1_8P STB ...
Page 34: ...WAVEFORMS 33 CON2_17P RF NSYS_RESET_3 3V ...
Page 35: ...WAVEFORMS 34 SDRAM CLK Crystal 4MHz ...
Page 36: ...WAVEFORMS 35 Crystal 27MHz IC1 7Pin 6Pin_open_close ...