18
CIRCUIT OPERATION MANUAL
Data
Parity
No Error
Uncorrectible Packet
No Error
BYTE CLK
P A C K E T
STR OUT
E R R O R
BY T E D A T A
Parallel Data Output Timing
TS Output is made by the Serial or Parallel function.
The relationship between TS output Data and Control signal is showing in the following diagram. If an error occurs Data is
ignored, and the Data in the Valid area is valid.
Parallel Output Timing
PIN NO MARK
DESCRIPTION
CURRENT RIPPLE(MAX)
1
LNB A
POWER INPUT OF LNB A
2
NC
3
5V(RF)
5V OF RF-AMP
20mA(TYP.) 20mVp-p
4
AGC
AGC MONITORING
5
5V
5V OF 2’nd AMP & ZERO-IF IC
20mA(TYP.) 20mVp-p
6
GND
7
VT
TUNING VOLTAGE 30V
* 20mVp-p
8
I
I SIGNAL MONITORING
9
Q
Q SIGNAL MONITORING
10
5V
POWER OF AGC AMP
10mA(TYP.) 20mVp-p
11
3.3V
POWER OF FEC IC
200mA(MAX.) 20mVp-p
12
F22
22kHz OUTPUT(serial 100ohm)
13
1.8V
PLL POWER of FEC IC
120mA(MAX.) 20mVp-p
14
RESET
ACTIVE LOW(serial 2Kohm)
15
ERROR OUT
ERROR OUTPUR(serial 100ohm)
16
FSTART
FSTART(serial 100ohm)
17
VALID
DATA VALID(serial 100ohm)
18
BCLK
BYTE CLOCK(serial 47ohm)
19-26
D0-D7
DATA OUTPUT(serial 100ohm)
27
DATA
I2C DATA(serial 100ohm)
28
CLOCK
I2C CLOCK(serial 100ohm)
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Summary of Contents for DSD-9251EAV
Page 17: ...16 CIRCUIT OPERATION MANUAL EMI Interface Timing All manuals and user guides at all guides com...
Page 41: ...40 SCHEMATIC DIAGRAM All manuals and user guides at all guides com a l l g u i d e s c o m...
Page 42: ...41 SCHEMATIC DIAGRAM All manuals and user guides at all guides com...
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Page 52: ...51 SCHEMATIC DIAGRAM All manuals and user guides at all guides com...
Page 53: ...52 SCHEMATIC DIAGRAM All manuals and user guides at all guides com...
Page 54: ...53 PARTS PLACEMENT ARRANGEMENT All manuals and user guides at all guides com...
Page 55: ...54 PARTS PLACEMENT ARRANGEMENT All manuals and user guides at all guides com...
Page 57: ...56 PARTS PLACEMENT ARRANGEMENT 9251 FRONT PCB All manuals and user guides at all guides com...
Page 58: ...57 PARTS PLACEMENT ARRANGEMENT All manuals and user guides at all guides com...
