Cypress S6J3200 Series, Manual

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CHAPTER 15:12-/10-/8-bit Analog to Digital Converter
288 S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G
4.6.
A/D Conversion

Single conversion
Figure 4-6 shows the example of A/D conversion (single conversion) operation.
Figure 4-6 A/D Conversion (Single Conversion, Channel i)
Start of A/D conversion
(single conversion, channel i)
Trigger type of channel i
(ADC12Bn_CHCTRLi.
TRGTYP[1:0])
Software trigger of channel i
(ADC12Bn_CHCTRLi.SWTRG = "1")
Software trigger
(TRGTYP[1:0] ="00" or "01")
- Hardware trigger
(TRGTYP[1:0] = "01")
- Completion of
the preceding
logical channel
(TRGTYP[1:0] = "10")
- idle trigger
(TRGTYP[1:0] = "11")
Detect conversion
done interrupt?
Yes
No
Read conversion done interrupt flag
of channel i
(ADC12Bn_CDONEIRQ0~1.CDONEIRQ)
Read conversion data of channel i
(ADC12Bn.CDi)
Continue operation of
A/D conversion?
Continue
Finish
Software trigger
(TRGTYP[1:0] = "00")
Exclude software trigger
(TRGTYP[1:0] expects "00")
Set as software trigger of all channels
(ADC12Bn_CHCTRL0~63.
TRGTYP[1:0] = "00")
During A/D conversion?
(ADC12Bn_TRGST0~1.
TRGST = "1")
Yes
No
All trigger status clear
(ADC12Bn_TRGCL0~1.TRGCL = "1")
End of A/D conversion
(single conversion, channel i)
A/D conversion request (trigger)
Wait for completing A/D conversion
Trigger type of channel 0~63
(ADC12Bn_CHCTRL0~63.
TRGTYP[1:0])
Finish operation of A/D conversion
Clear conversion done
interrupt flag