Cypress S6J3200 Series, Manual

Page: 241 / 1355

CHAPTER 13:Low-voltage Detection
240 S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G
3.
Operation
3.1.
LVD operation
Table 3-1: LVD Description
Channel Monitor Detected Voltage
Operation after
detection
Enable/Disable
Description
(Purpose)
LVDL0
Embedded regulator
output
Specific Reset only Always enable
RAM retention voltage
supervision.
Power on condition
supervision.
LVDH0 VCC5 Specific Reset only Always enable
Power on condition
supervision.
LVDL1
Embedded regulator
output
Configurable Reset or interrupt Configurable
PD1 power supply
supervision.
LVDH1 VCC5 Configurable Reset or interrupt Configurable
Internal regulator input
and 5V I/O power
supply supervision.
LVDL2 VCC12 Configurable Reset or interrupt Configurable
PD2 power supply
supervision.
LVDH2 VCC3 Configurable Reset or interrupt Configurable
3V I/O power supply
supervision.
Notes:
−
PONR will be
−
generated by means of either LVDL0 or LVDH0 detected.
−
released by means of both LVDL0 and LVDH0 released.
−
The voltage for both to detect and to release is specified in the datasheet.
3.2.
Configurations
Function enable/disable, detected voltage threshold, and operation option after low-voltage detection are
selectable and configurable for LVDL1, LVDH1, LVDL2, and LVDH2 by software.
As for LVDL0 and LVDH0 anything cannot be configured by software. The functions are always enabled,
detect specific voltage, and only generate reset.
The voltage range of detect and release for each is specified in datasheet.
Bit name Description
LVDL1S, LVDH1S, LVDL2S, LVDH2S 0: Reset, 1: Interrupt
LVDL1V, LVDH1V, LVDL2V, LVDH2V Threshold voltage can be configured to the bit range.
LVDL1E, LVDH1E, LVDL2E, LVDH2E 0: Disable, 1: Enable