Cypress PSoC CY8CTMG20 Series, Technical Reference Manual

Page: 219 / 308

PSoC CY8CTMG20x and CY8CTST200 TRM, Document No. 001-53603 Rev. *C 219
CS_SLEW
0,A8h
21.3.31 CS_SLEW
TrueTouch Slew Control Register
This register enables and controls a fast slewing mode for the relaxation oscillator.
For additional information, refer to the Register Definitions on page 92 in the TrueTouch Module chapter .
7:1 FastSlew[6:0] This 7-bit value sets a counter, clocked at the IMO frequency. While the counter is counting down
from this value, the relaxation oscillator edge slews at the maximum gain setting. During this interval,
the IRANGE bits in the CS_CR2 register are internally set to maximum (11b). At the end of the inter-
val, the user-defined IRANGE level is restored so that the relaxation oscillator continues slewing with
a slower edge rate to the target voltage threshold. If the FS_EN bit is low, the FastSlew setting has no
effect.
After each edge of the relaxation oscillator, the counter is re-loaded and the fast slewing interval re-
occurs, followed by the slower edge rate at the end of the count down.
Note that the IRANGE bits in the CS_CR2 register always read the user-defined setting. Because the
IRANGE value is forced to maximum during this interval, the increase in the edge rate can be 1X, 2X,
4X, or 8X, depending on the programmed value of the IRANGE bits.
0000000b
No fast edge rate interval.
0000001b Minimum fast edge rate interval (1 IMO period).
…
1111111b
Maximum fast edge rate interval (127 IMO period).
0 FS_EN Enable bit for the Fast Slew mode.
0
Fast slew mode disabled.
1 Fast slew mode enabled. After each relaxation oscillator transition, the relaxation oscillator
runs with a higher current for a time controlled by the FastSlew bits.
Individual Register Names and Addresses:
0,A8h
CS_SLEW : 0,A8h
7 6 5 4 3 2 1 0
Access : POR RW : 00 RW : 0
Bit Name FastSlew[6:0] FS_EN
Bit Name Description
[+] Feedback