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CY8CKIT-029 PSoC® LCD Segment Drive Expansion Board Kit Guide, Doc. # 001-55415 Rev. *K
Contents
5. Code Examples
29
5.1
Code Example 1: LCD_Seg_Example1_Battery_Meter............................................29
5.1.1 Project Description.........................................................................................29
5.1.2 Running the Code Example ...........................................................................29
5.1.3 Hardware Connections ..................................................................................29
5.1.4 Verifying Output .............................................................................................30
5.1.5 PSoC Creator Project Details ........................................................................30
5.1.5.1 LCD_Seg .........................................................................................30
5.1.5.2 ADC_DelSig ....................................................................................35
5.1.5.3 VR....................................................................................................36
5.2
Code Example 2: LCD_Seg_Example2_StopWatch.................................................37
5.2.1 Project Description.........................................................................................37
5.2.2 Running the Code Example ...........................................................................38
5.2.3 Hardware Connections for CY8CKIT-001 DVK..............................................38
5.2.4 Hardware Connections for CY8CKIT-030/CY8CKIT-050LP DVK ..................39
5.2.5 Verifying the Output .......................................................................................39
5.2.6 PSoC Creator Project Details ........................................................................40
5.2.6.1 LCD_Seg .........................................................................................40
5.2.6.2 Real Time Clock (RTC) ...................................................................45
5.2.6.3 Status Register ................................................................................45
5.2.6.4 Sw_Sample_Clock ..........................................................................46
5.2.6.5 Clock_SW........................................................................................46
A. Appendix
49
A.1
Schematic..................................................................................................................49
A.2
Board Layout .............................................................................................................50
A.2.1 PDCR-09571 Top View..................................................................................50
A.2.2 PDCR-09571 Bottom View ............................................................................50
A.3
BOM .........................................................................................................................51
A.4
Regulatory Compliance Information ..........................................................................51
Revision History
53
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