Cypress AN2121SC Product Manual Download Page 9

EZ-USB Series 2100

To write data to outside logic, the 8051 loads a data pointer with a USB FIFO register address, and then executes a “movx
a,@dptr” instruction to move a byte from the FIFO to the 8051 accumulator. The EZ-USB core simultaneously broadcasts the FIFO
data on the external data bus pins and generates the external write signal FWR# (Fast Write). A 24 MHz clock is provided for use
as an external FIFO clock, if required. EZ-USB control bits allow the timing and polarity of the FWR# signal to be tailored for
different external interface requirements.

To read data from outside logic, the 8051 loads a data pointer with a USB FIFO register address, and then executes a “movx
@dptr,a” instruction to move a byte from the accumulator to the FIFO. The EZ-USB core discards the accumulator data and instead
writes a byte from the external data bus pins to the FIFO. The EZ-USB core provides the external read signal FRD# (Fast Read) to
strobe the data, and a 24 MHz clock. Like the FRW# signal, the FRD# signal may be tailored for different interface requirements.

support extra features such as a
second data pointer, a second
UART, cycle-stretched timing, an
expanded interrupt system, and
enhanced timers.

instructions on bits, flags, and
other status functions are identi-
cal to the standard 8051. The
enhanced 8051 core also provides
special function registers that

The enhanced 8051 processor
increases performance by
executing most instructions in
four clock cycles instead of
twelve, as in the standard 8051.
The enhanced 8051 core also
runs at 24 MHz; that’s twice as
fast as the standard part. These
factors improve the execution
rate for most instructions by a
factor of five. The enhanced
8051 core contained in the
EZ-USB family is binary-code
compatible and performs the
same functions as the industry-
standard 8051. The effects of

A Leap in Performance with 8051 Compatibility

Clocks per instruction cycle

12

4

Data pointers

1

2

Serial ports (UARTs)

1

2

16-bit timers

1

3

Interrupt sources (int and ext)

5

13

Stretch memory cycles

No

Yes

Nominal operating frequency 12 MHz

24 MHz

Nominal operating voltage

5 V

3.3 V

Feature

Standard

Anchor

Summary of Contents for AN2121SC

Page 1: ...also supports an equiva lent data transfer rate for bulk packets of over 2 Mbytes per second which is more than the USB bandwidth The EZ USB family conforms to the high speed 12 Mbps require ments of...

Page 2: ...y eliminates the need to become an expert in USB It allows the designer to take advantage of the benefits of USB without investing large amounts of time and energy With the EZ USB family peripheral de...

Page 3: ...nificantly less 8051 USB code since core handles most USB activity Architecture Shortened USB learning curve Quicker working prototypes and final production models More software development time to de...

Page 4: ...gn implementation Peripheral manufacturers can provide firmware updates in conjunction with driver changes via a floppy disk or through Internet downloads Thus Unprecedented Soft Architecture software...

Page 5: ...code download while holding the 8051 in reset Once enumerated the host PC downloads 8051 code into EZ USB RAM over the USB interface Anchor Chips supplies the software tools to incorporate the loader...

Page 6: ...compared to other solutions And since less memory is needed for firmware board size and system cost are reduced Automatically Handles Low Level USB Overhead Test Code Supports USB Chapter 9 String des...

Page 7: ...rt address of the requested descriptor data 2 The EZ USB core does the rest The EZ USB core automatically takes care of error checking and retries dividing the table into packets for the various IN tr...

Page 8: ...he last frame s data while the other FIFO empties or fills with new USB data A single movx instruction transfers data between EZ USB endpoint FIFOs and external logic in two cycles or 330 nano seconds...

Page 9: ...ike the FRW signal the FRD signal may be tailored for different interface requirements support extra features such as a second data pointer a second UART cycle stretched timing an expanded interrupt s...

Page 10: ...ware Because of the flexibility of the external EEPROM and inter nal RAM manufacturers have the option to make last minute changes to a design code without impacting production schedules External mem...

Page 11: ...ata integrity must be guaran teed but without critical delivery time The EZ USB family provides 14 bulk endpoints seven IN and seven OUT These endpoints can be programmed to be double buffered which i...

Page 12: ...signals and provide a convenient interface to a logic analyzer C Compiler from Keil The C compiler from Keil Soft ware lets the designer write 8051 microcontroller applications in C and still get the...

Page 13: ...are frame works With this library of predefined function calls devel opers can quickly develop their peripheral function The firm ware library includes functions such as ReNumeration I2 C programming...

Page 14: ...nd Pin Definitions 1 10 10 9 90 13 45 12 95 8 00 REF 11 33 23 12 22 44 34 0 80 BSC 44 PQFP 2 35 MAX 0 45 0 30 0o 7o 1 00 0 80 1 95 0 15 80 Pin Lead Detail 2 7 6 2 6 6 0 28 0 18 8 Places 12o REF Base P...

Page 15: ...o P d n u o r G d n a r e w o P d n u o r G d n a r e w o P d n u o r G d n a r e w o P 7 7 8 1 D N G A 0 1 0 1 1 2 C C V A 5 4 3 1 3 2 2 1 6 8 3 4 3 5 4 3 1 3 2 2 1 6 8 3 4 3 3 1 6 5 3 3 2 7 1 4 1 3...

Page 16: ...10 Fax 408 943 6848 www cypress com Anchor Chips Incorporated 12396 World Trade Drive M S 212 San Diego CA 92128 Telephone 858 613 7900 Fax 858 676 6896 www anchorchips com A Business Unit of Cypress...

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