CY62256
Document #: 38-05248 Rev. *B
Page 3 of 11
I
SB2
Automatic CE
Power-down Current—
CMOS Inputs
Max. V
CC
, CE > V
CC
−
0.3V
V
IN
> V
CC
−
0.3V, or V
IN
<
0.3V, f = 0
1
5
1
5
mA
L
2
50
2
50
µ
A
LL
0.1
5
0.1
5
µ
A
Indust’l Temp Range
LL
0.1
10
0.1
10
µ
A
Capacitance
[4]
Parameter
Description
Test Conditions
Max.
Unit
C
IN
Input Capacitance
T
A
= 25
°
C, f = 1 MHz,
V
CC
= 5.0V
6
pF
C
OUT
Output Capacitance
8
pF
Electrical Characteristics
Over the Operating Range (continued)
Parameter
Description
Test Conditions
CY62256
−
55
CY62256
−
70
Unit
Min. Typ.
[3]
Max.
Min. Typ.
[3]
Max.
AC Test Loads and Waveforms
Data Retention Characteristics
Parameter
Description
Conditions
[5]
Min.
Typ.
[3]
Max.
Unit
V
DR
V
CC
for Data Retention
2.0
V
I
CCDR
Data Retention Current
L
V
CC
= 3.0V, CE > V
CC
−
0.3V,
V
IN
> V
CC
−
0.3V, or V
IN
< 0.3V
2
50
µ
A
LL
0.1
5
µ
A
LL Ind’l
0.1
10
µ
A
t
CDR
[4]
Chip Deselect to Data Retention Time
0
ns
t
R
[4]
Operation Recovery Time
t
RC
ns
Data Retention Waveform
Notes:
4.
Tested initially and after any design or process changes that may affect these parameters.
5.
No input may exceed V
CC
+ 0.5V.
3.0V
5V
OUTPUT
R1 1800
Ω
R2
990
Ω
100 pF
INCLUDING
JIG AND
SCOPE
GND
90%
10%
90%
10%
< 5 ns
< 5 ns
5V
OUTPUT
R1 1800
Ω
R2
990
Ω
5 pF
INCLUDING
JIG AND
SCOPE
(a)
(b)
OUTPUT
1.77V
Equivalent to:
THÉ
VENIN EQUIVALENT
ALL INPUT PULSES
639
Ω
3.0V
3.0V
t
CDR
V
DR
> 2V
DATA RETENTION MODE
t
R
CE
V
CC
