Cypress Semiconductor MoBL CY62138F, Specification Sheet

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Document #: 001-13194 Rev. *A Page 3 of 10
CY62138F MoBL
®
Maximum Ratings
Exceeding maximum ratings may impair the useful life of the
device. These user guidelines are not tested.
Storage Temperature ................................ –65°C to + 150°C
Ambient Temperature with
Power Applied ........................................... –55°C to + 125°C
Supply Voltage to Ground
Potential ................................–0.5V to 6.0V (V
CCmax
+ 0.5V)
DC Voltage Applied to Outputs
in High-Z state
[4, 5]
................–0.5V to 6.0V (V
CCmax
+ 0.5V)
DC Input Voltage
[4, 5]
............ –0.5V to 6.0V (V
CCmax
+ 0.5V)
Output Current into Outputs (LOW) ............................ 20 mA
Static Discharge Voltage ......................................... > 2001V
(MIL–STD–883, Method 3015)
Latch-up Current ................................................... > 200 mA
Operating Range
Device Range
Ambient
Temperature
V
CC
[6]
CY62138FLL Industrial –40°C to +85°C 4.5V to 5.5V
Electrical Characteristics
(Over the Operating Range)
Parameter Description Test Conditions
45 ns
Unit
Min Typ
[3]
Max
V
OH
Output HIGH Voltage I
OH
= –1.0 mA 2.4 V
V
OL
Output LOW Voltage I
OL
= 2.1 mA 0.4 V
V
IH
Input HIGH Voltage V
CC
= 4.5V to 5.5V 2.2 V
CC
+ 0.5 V
V
IL
Input LOW Voltage V
CC
= 4.5V to 5.5V –0.5 0.8 V
I
IX
Input Leakage Current GND < V
I
< V
CC
–1 +1
µ
A
I
OZ
Output Leakage Current GND < V
O
< V
CC
, Output Disabled –1 +1
µ
A
I
CC
V
CC
Operating Supply
Current
f = f
max
= 1/t
RC
V
CC
= V
CC(max)
I
OUT
= 0 mA
CMOS levels
13 18 mA
f = 1 MHz 1.6 2.5
I
SB2
[7]
Automatic CE Power Down
Current CMOS inputs
CE
1
> V
CC
– 0.2V or CE
2
< 0.2V
V
IN
> V
CC
– 0.2V or V
IN
< 0.2V,
f = 0, V
CC
= V
CC(max)
1 5
µ
A
Capacitance
(For all packages)
[8]
Parameter Description Test Conditions Max Unit
C
IN
Input capacitance T
A
= 25°C, f = 1 MHz,
V
CC
= V
CC(typ)
10 pF
C
OUT
Output capacitance 10 pF
Thermal Resistance [8]
Parameter Description Test Conditions SOIC TSOP II Unit
Θ
JA
Thermal Resistance
(Junction to Ambient)
Still air, soldered on a 3 × 4.5 inch
two-layer printed circuit board
44.53 44.16
°
C/W
Θ
JC
Thermal Resistance
(Junction to Case)
24.05 11.97
°
C/W
Notes
4. V
IL(min)
= –2.0V for pulse durations less than 20 ns.
5. V
IH(max)
= V
CC
+0.75V for pulse durations less than 20ns.
6. Full device AC operation assumes a 100
µ
s ramp time from 0 to V
CC
(min) and 200
µ
s wait time after V
CC
stabilization.
7. Only chip enables (CE
1
and CE
2
) must be at CMOS level to meet the I
SB2
/ I
CCDR
spec. Other inputs can be left floating.
8. Tested initially and after any design or process changes that may affect these parameters.
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