CY7C1018CV33
Document #: 38-05131 Rev. *D
Page 4 of 7
Switching Waveforms
Read Cycle No. 1
[11, 12]
Read Cycle No. 2 (OE Controlled)
[12, 13]
Write Cycle No. 1 (CE Controlled)
[14, 15]
Notes:
11. Device is continuously selected. OE, CE = V
IL
.
12. WE is HIGH for Read cycle.
13. Address valid prior to or coincident with CE transition LOW.
14. Data I/O is high impedance if OE = V
IH
.
15. If CE goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state.
PREVIOUS DATA VALID
DATA VALID
t
RC
t
AA
t
OHA
ADDRESS
DATA OUT
50%
50%
DATA VALID
t
RC
t
ACE
t
DOE
t
LZOE
t
LZCE
t
PU
HIGH IMPEDANCE
t
HZOE
t
HZCE
t
PD
HIGH
OE
CE
ICC
ISB
IMPEDANCE
ADDRESS
DATA OUT
V
CC
SUPPLY
CURRENT
t
WC
DATA VALID
t
AW
t
SA
t
PWE
t
HA
t
HD
t
SD
t
SCE
t
SCE
CE
ADDRESS
WE
DATA I/O
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