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CY7B9910
CY7B9920

Document Number: 38-07135  Rev. *B

Page 7 of 11

Switching Characteristics

Over the Operating Range

[11] 

(continued)

CY7B9910–7

CY7B9920–7

Parameter

Description

Min

Typ

Max

Min

Typ

Max

Unit

f

NOM

Operating Clock 
Frequency in MHz

FS = LOW

[1, 2]

15

30

15

30

MHz

FS = MID

[1, 2]

25

50

25

50

FS = HIGH

1, 2, 3]

40

80

40

80

[12]

t

RPWH

REF Pulse Width HIGH

5.0

5.0

ns

t

RPWL

REF Pulse Width LOW

5.0

5.0

ns

t

SKEW

Zero Output Skew (All Outputs)

[13, 14]

0.3

0.75

0.3

0.75

ns

t

DEV

Device-to-Device Skew

[8, 15]

1.5

1.5

ns

t

PD

Propagation Delay, REF Rise to FB Rise

–0.7

0.0

+0.7

–0.7

0.0

+0.7

ns

t

ODCV

Output Duty Cycle Variation

[16]

–1.2

0.0

+1.2

–1.2

0.0

+1.2

ns

t

ORISE

Output Rise Time

[17, 18]

0.15

1.5

2.5

0.5

3.0

5.0

ns

t

OFALL

Output Fall Time

17, 18]

0.15

1.5

2.5

0.5

3.0

5.0

ns

t

LOCK

PLL Lock Time

[19]

0.5

0.5

ms

t

JR

Cycle-to-Cycle Output 
Jitter

Peak to Peak

[8]

200

200

ps

t

JR

RMS

[8]

25

25

ps

[+] Feedback 

[+] Feedback 

Summary of Contents for CY7B9910

Page 1: ...9920 CMOS The completely integrated PLL enables zero delay capability External divide capability combined with the internal PLL allows distribution of a low frequency clock that is multiplied by virtu...

Page 2: ...o one of the eight outputs FS 1 2 3 I Three level frequency range select TEST I Three level select See TEST MODE Q 0 7 O Clock outputs VCCN PWR Power supply for output drivers VCCQ PWR Power supply fo...

Page 3: ...orage Temperature 65 C to 150 C Ambient Temperature with Power Applied 55 C to 125 C Supply Voltage to Ground Potential 0 5V to 7 0V DC Input Voltage 0 5V to 7 0V Output Current into Outputs LOW 64 mA...

Page 4: ...l 85 85 mA Mil Ind 90 90 ICCN Output Buffer Current per Output Pair 6 VCCN VCCQ Max IOUT 0 mA Input Selects Open fMAX 14 19 mA PD Power Dissipation per Output Pair 7 VCCN VCCQ Max IOUT 0 mA Input Sel...

Page 5: ...pF CL 30 pF for 5 and 2devices Includes fixture and probe capacitance VCC Switching Characteristics Over the Operating Range 11 CY7B9910 2 8 CY7B9920 2 8 Parameter Description Min Typ Max Min Typ Max...

Page 6: ...he CY7B9920 are CMOS levels VCC 2 to VCC 2 Test conditions assume signal transition times of 2ns or less and output loading as shown in the AC Test Loads and Waveforms unless otherwise specified 12 Ex...

Page 7: ...HIGH 5 0 5 0 ns tRPWL REF Pulse Width LOW 5 0 5 0 ns tSKEW Zero Output Skew All Outputs 13 14 0 3 0 75 0 3 0 75 ns tDEV Device to Device Skew 8 15 1 5 1 5 ns tPD Propagation Delay REF Rise to FB Rise...

Page 8: ...C Timing Diagrams Figure 1 AC Timing Diagrams Figure 2 Zero Skew and Zero Delay Clock Driver tODCV tODCV tREF REF FB Q OTHERQ tRPWH tRPWL tPD tSKEW tSKEW tJR SYSTEM CLOCK FB REF FS Q0 Q1 Q2 Q3 Q4 Q5 Q...

Page 9: ...ew speci fication coupled with the ability to drive terminated transmission lines with impedances as low as 50 ohms enables efficient printed circuit board design Figure 1 shows the CY7B9910 9920 conn...

Page 10: ...Y7B9920 5SI 24 Pb Small Outline IC Industrial 750 CY7B9910 7SC 24 Pb Small Outline IC Commercial CY7B9910 7SI 20 24 Pb Small Outline IC Industrial CY7B9920 7SC 20 24 Pb Small Outline IC Commercial CY7...

Page 11: ...otection United States and foreign United States copyright laws and international treaty provisions Cypress hereby grants to licensee a personal non exclusive non transferable license to copy use modi...

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