CyberOptics Imagenation PXD1000 Page 17 Configuration Download | Manualshive

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17

Pixel Clock Source

Most digital cameras provide their own pixel clock to the frame grabber but in
situations where a custom frame and pixel rate are required, the frame grabber
must create the pixel clock for the camera. A pixel clock source provides more
flexibility for the system integrator.

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Summary of Contents for Imagenation PXD1000

Page 1: ... operate with the PXD1000 Why Is It Necessary To Build a Unique Cable Configuration File For Each Digital Camera Due to a lack of industry standards in the digital camera world it is typically necessary to have a specially configured cable for the frame grabber and each digital camera make and model This is because in general each digital camera can have unique connectors signal pin outs data form...

Page 2: ...Pulnix TM 9701 RETICON RLS Reticon Line Scan UNIQ UNIQ UNIQ Cameras UP 600 UP 1000 UP 1030 UP 900 2 Build your own cable If your camera is not listed you will need to create a camera definition file and build a compatible cable We provide an easy to use camera configuration application and customizable cable assemblies that simplify camera and frame grabber setup If you decide to build the entire ...

Page 3: ...es the Data connection to the upper bits of each channel This means that that your data bits from the camera need to be shifted Camera Data Channel 1 PXD DATA BITS Camera Data Channel 2 PXD DATA BITS 8 Bit 0 7 Data Bits 8 15 8 Bit 0 7 Data Bits 24 31 10 Bit 0 9 Data Bits 6 15 10 Bit 0 9 Data Bits 22 31 12 Bit 0 12 Data Bits 4 15 12 Bit 0 12 Data Bits 20 31 16 Bit 0 15 Data Bits 0 15 16 Bit 0 15 Da...

Page 4: ... to provide a valid Pixel in line Signal High or low depending on camera VD pin 60 pin 10 Name Vertical Drive Signal provided by Frame Grabber Purpose Tells camera to provide a valid line Signal High or low depending on camera Ground Strobe 0 pin 59 Strobe 0 pin 59 Name Strobe 0 Signal provided by Frame Grabber Purpose Provides a series of timed pulses for use by application Signal Pulse train of ...

Page 5: ...r odd field for interlaced output CTRL 0 pin 54 CTRL 0 pin 4 Name Control 0 Signal provided by Frame Grabber Purpose Provides TTL output for use by application CTRL 1 pin 53 CTRL 1 pin 3 Name Control 1 Signal provided by Frame Grabber Purpose Provides TTL output for use by application CTRL 2 pin 52 CTRL 2 pin 2 Name Control 2 Signal provided by Frame Grabber Purpose Provides TTL output for use by ...

Page 6: ...6 Figure 1 Data connector J2 ...

Page 7: ...your camera manual for the part number of the connector used on the camera and get the pin out of the camera connector from the camera manufacturer If you use a camera that has 10 or fewer data bits we recommend that you use Cable Kit CB 012 00 With some cameras every data line may need to be terminated to 200mv provided at pin 66 of J2 In this case the smaller cable will have fewer wires that nee...

Page 8: ... 12 Brown White 62 White Brown GROUND FDV 13 Orange Yellow 63 Yellow Orange FDV LDV 14 Gray Tan 64 Tan Gray LDV CAMCLK 15 Purple Tan 65 Tan Purple CAMCLK GROUND 16 Gray Pink 66 Pink Gray 200MV Data31 17 White Orange 67 Orange White Data31 Data30 18 Brown Green 68 Greeen Brown Data30 Data29 19 Purple Yellow 69 Yellow Purple Data29 Data28 20 White Yellow 70 Yellow White Data28 Data27 21 Brown Blue 7...

Page 9: ... Gray CRTL0 FIELD 5 Brown Pink 55 Pink Brown FIELD WEN 6 Green Yellow 56 Yellow Green WEN SYNTHCLK 7 Green Orange 57 Orange Green SYNTHCLK STROBE1 8 Brown Orange 58 Orange Brown GND STROBE1 STROBE0 9 Pink White 59 White Pink GND STROBE0 VD 10 Blue Yellow 60 Yellow Blue GND VD HD 11 Brown Yellow 61 Yellow Brown GND HD GROUND 12 Brown White 62 White Brown GROUND FDV 13 Orange Yellow 63 Yellow Orange...

Page 10: ...en you will need a compatible mating cable plug for the PXD1000 The mating cable plug for the PXD100 is an AMP Amplimite 050 Series Cable Plug Connector Series III AMP PN 749621 9 or equivalent b How long can the Digital Cable be Imagenation recommends that the cables for the digital camera to PXD1000 be 10 meters in length or less If cables are any longer than 10 meters unpredictable results may ...

Page 11: ...n for single channel interlaced camera iii Next Three buttons are for 2 Channel cameras iv Next Three buttons are for 4 Channel cameras v The Custom button allows you to define a new format Exposure Timing Select Exposure Timing Tab a Exposure control Type i Async for cameras that generate frames that are occasionally controlled by something other than the frame grabber For example this setting ca...

Page 12: ...obe 1 pins Setting the Video Timing Select the Video Timing tab a Enter Pixel clock speed from the camera specification i The pixel clock speed is used to set the clock generator of the frame grabber This setting must be correct in order for the camera to work properly b Set the Frame Speed i If the exposure time on your camera which should be listed in your camera manual is longer than the minimu...

Page 13: ... line on field 0 and field 1 Both fields are usually set to the width of the image size Vdrive offset Number of pixel clocks after the edge of the Hdrive that Vdrive goes active c If your camera requires a clock from the PXDl000 set the Clocks per Pixel Most cameras require one clock per pixel but some require two Refer to your camera manual for the correct setting d Set the Strobe Drive Signal Th...

Page 14: ...t formats standards i e RS422 TTL LDVS RS644 RS422 are the type of input output signal generated by the camera They are parallel differential signal The state of the signal at the receiver is determine by the potential difference between two wires The Interface data receivers are LVDS on the data connector and the signals on the I O connector are single ended TTL only Reference pages 51 58 and 336...

Page 15: ...ame rates high many digital cameras deliver image data via multiple synchronized digital outputs called channels Each channel is used to transfer only a portion of the image information For example the Dalsa CA D4 is 1024 x 1024 8 bit pixel camera can operate as either a one or two channel camera In order for a digital frame grabber to be able to receive more than one pixel at a time it must first...

Page 16: ...fficient the PCI interface is EIA422 B vs EIA 644 These are balanced data transmission standards that require two wires per signal The state of the signal at the receiver is determined by the potential difference between the two wires and not by the difference between the signal on a single wire and ground Since each wire in the pair is subjected to roughly the same transmission environment electr...

Page 17: ...vide their own pixel clock to the frame grabber but in situations where a custom frame and pixel rate are required the frame grabber must create the pixel clock for the camera A pixel clock source provides more flexibility for the system integrator ...

Page 18: ...annel is from one step in toward the centerline Figure 2 Channel 1 in the Dalsa CA D4 in 2 channel mode transmits image data beginning at the left edge of the top row continuing to the midpoint at which time it returns to the left edge to begin line two It continues sending the data line by line until it reaches the bottom of the image Channel 2 transmits right to left stopping at the midpoint and...

Page 19: ...frame grabber To alleviate this problem many digital frame grabbers incorporate pixel swizzling circuitry to dynamically rearrange the pixels into scan line order so that the application can immediately begin the image processing task Differeent cameras employ a number of different image formatting schemes The most common are shown in Figure 4 Figure 4 ...

Page 20: ...ry to be freed up to other applications when the requestor is finished But large contiguous blocks of memory might not be available at run time because as a computer opens and closes applications the memory gets fragmented into smaller blocks A frame grabber that supports scatter gather uses small blocks of memory as if it has a large contiguous block It does this by building a table of addresses ...

Page 21: ...Possible Cause Solution Data lines wired incorrectly Verify that on the PXD1000 the data lines coming from the camera are biased to the higher order bits see example in this manual For example if a one channel 10 bit camera was wired to pins 0 10 rather than 6 15 like it is suppose to be then only data lines 9 and 10 would actually be receiving data input from the camera and thus changing the disp...

Page 22: ...ns which should be swapped will depend on whether the pixel clock is being driven by the camera most common or is driven by the Frame Grabber For example if the camera is driving the pixel clock try reversing the CAMCLK pins pin 65 and pin 15 or if the Frame Grabber is driving the pixel clock try reversing the Synthclk pins pin 57 and pin ...

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