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KIT8020CRD8FF1217P-1 

CREE Silicon Carbide MOSFET   

Evaluation Kit 

 

User

’s Manual

 

 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 

 
 

 

This  document  is  prepared as a user  reference guide to install and operate CREE  evaluation 
hardware.   

 

Safety Note:

 Cree designed evaluation hardware is meant to be an evaluation tool in a 

lab setting for Cree components and to be handled and operated by highly qualified 
technicians or engineers. The hardware is not designed to meet any particular safety 
standards and the tool is not a production qualified assembly

 

 

 

1

Subject to change without notice.

www.cree.com

Summary of Contents for KIT8020CRD8FF1217P-1

Page 1: ...hardware Safety Note Cree designed evaluation hardware is meant to be an evaluation tool in a lab setting for Cree components and to be handled and operated by highly qualified technicians or engineers The hardware is not designed to meet any particular safety standards and the tool is not a production qualified assembly 1 Subject to change without notice www cree com ...

Page 2: ... hardware configuration Cree SiC power devices and an example application when using this board 2 Package Contents Item No QTY P N Description 1 1 CRD8FF1217P 1 Avago Driver version Eval board 2 4 AOS2182471 Ceramic tile 3 1 57908 Heat sink with mounting holes 4 2 C2M0080120D 80 mohm MOSFET 5 2 C4D20120D 20A Diode 6 1 Copper shorting strip 7 2 74270011 Ferrite Bead 8 8 91166a210 M3 washer Zn S 7mm...

Page 3: ...cuit a 5V zener in parallel with 1uF capacitor is used to generate 5V Vgs voltage for the SiC MOSFET turn off and turn on Vgs voltage is equal to 24V 5V 19V Note that SiC MOSFET can be turned off with zero voltage and the 5V turn off voltage helps with faster turn off and lower turn off losses and also improves dv dt induced self turn on and noise immunity during transient periods with more margin...

Page 4: ...at can be implemented using this EVL board For the phase leg configuration it can either use discrete anti parallel SiC SBD or body diode of SiC MOSFET thus body diode of SiC MOSFET can be evaluated without anti parallel diode with option one in the below table With double EVL boards H bridge converter and bi directional DC DC converter can be configured For H bridge with different control archite...

Page 5: ...hree Non syn Buck converter Q2 D1 CON1 CON3 CON2 CON5 HVDC L Cout RL Cin Step down voltage Connect inductor L with CON3 as output CON1 INPUT CON3 OUTPUT CON2 CON5 GND Option Four Syn Boost converter L Cin RL Cout HVDC Q2 Q1 CON1 CON3 CON2 CON5 Step up voltage Connect inductor L with CON3 as input CON1 OUTPUT CON3 INPUT CON2 CON5 GND Option Five Non syn Boost converter L Cin RL Cout HVDC D3 Q1 CON1...

Page 6: ... CON3 CON2 CON5 Q2 Q1 EVL1 EVL2 Full bridge converter with Phase shift or resonant single phase DC AC inverter Option Eight Bi directional DC DC converter Q2 Q1 CON1 CON3 CON2 CON5 L C1 CON1 CON3 CON2 CON5 Q2 Q1 EVL1 EVL2 C2 Port1 Port2 Port 1 is input and port 2 is output with Buck converter Q2 of EVL2 is constantly turn on and Q1 of EVL2 is constantly turn off Port 1 is output and port 2 is inpu...

Page 7: ... measure current using current probe Another option is to use accurate coaxial shunt resistors not provided in the kit from T M Research www tandmresearch com to make the measurement This option can minimize the stray inductance on the switching loops and achieve accurate switching loss measurement Lastly one can also simply short JM1 with the small shorting strips provided in the kit if it s not ...

Page 8: ...tching power trace which can minimize high dv dt and di dt noise influence from the switching node to gate signal Four de coupling film capacitors with value 10nF 10nF 0 1uF and 5uFare placed close to the SiC devices and it can reduce high frequency switching loop and bypass noise within switching loop The layout of gate drive circuitry is designed with symmetric trace distance which can introduce...

Page 9: ...this phase leg configuration which frequency is normally ranged from 15KHZ to 20KHZ In the testing two 25mohm SiC MOSFETs are assembled on the PCB board with heatsink for both high side Q2 and low side Q1 The figure gives the test setup with EVL boards The signal generators are used to generate high side and low side PWM signals with Input_HS and Input_LS Note that the dead time period must be app...

Page 10: ... Vgs waveform All probes must be placed as close as possible to reduce incorrect ringing due to probe placement Place the power inductor as close as possible to connect at CON3 to reduce the switching node loop area and a 1uF 1200V film capacitors is connected between the output of inductor and ground connector CON5 A 12W AC fan is used to cool the heatsink and inductor when measuring waveforms an...

Page 11: ...ode conducts before low side MOSFET is turned on thus this low side MOSFET operates in Zero Voltage Switching ZVS mode and high side MOSFET operates in hard switching mode However high dv dt during fast transient of high side MOSFET will affect the operational behavior of the low side MOSFET and the charge stored in miller capacitance will be transferred via its gate loop inducing some spurious ga...

Page 12: ...8FF1217P 1_UM Rev User Manual Figure 9 Vgs Id and Vds waveforms at 9KW loading Ch1 low side Vds yellow 200v div Ch2 low side Id blue 100mv 0 0131ohm div Ch3 low side Vgs pink 10v div Ch4 high side Vgs green 10v div ...

Page 13: ... switching devices and capacitors Considering the high switching frequency 40kHz and high duty cycle 50 the efficiency is high compared to conventional Si IGBT solutions Figure 11 Efficiency data for this EVL board Figure 12 shows the thermal performance for this EVL board at full load 9KW after 30 minutes of continuous operation The test condition is at room temperature with open frame and 12W fa...

Page 14: ...ETs Available in Cree website http www cree com Power Document Library 4 Design Considerations for Designing with Cree SiC Modules Part 1 Understanding the Effects of Parasitic Inductance Available in Cree website http www cree com Power Document Library 5 Design Considerations for Designing with Cree SiC Modules Part 2 Understanding the Effects of Parasitic Inductance Available in Cree website ht...

Page 15: ... Apply thermal grease to the back side of the device package and align mounting hole to the thermal isolator and heatsink 3 Use the M3x10mm screw to secure 0 8 Nm the device to the heatsink 4 Attach the EVL board to the heatsink using the 4x standoffs 4x M3x21mm mounting screws and 4x washers 1Nm 5 Solder the MOSFET and Diode devices to the EVL board Reference table for package contents on page 1 ...

Page 16: ... C0603 R5 240 R0603 Q2 SiC MOSFET TO 247 Input_LS_RTN Input_LS D1 C4D20120D TO 247 1 3 2 C1 1nF C1206 D2 1N5819HW SOD 123 CON3 MID PT 1 CON1 HVDC 1 C2 1uF C1206 CON2 GND 1 R2 5R1 R1206 C12 4 7uF C1206 C10 0 1uF C0603 C13 33pF C0603 U1 ACPL W346 Anode 1 NC 2 Cathode 3 Gnd 4 Vout 5 Vcc 6 C14 0 1uF C0603 VCC_RTN VCC Input_LS_RTN Input_LS VCC_RTN VCC Input_HS_RTN Input_HS Input_HS_RTN Input_HS GND 22V...

Page 17: ...COS CAP FILM 0 1UF 1 6KVDC RADIAL PP THR 21 C20 5uF B32774D1505K EPCOS CAP FILM 5UF 1 3KVDC RADIAL PP THR 22 C21 1uF Ceramic X7R 10 SMD C0603 23 C22 1uF Ceramic X7R 10 SMD C0603 24 C23 220pF C1210C221JGGACTU Kemet CAP CER 220PF 2KV 5 NP0 1210 SMD C1210 25 C24 220pF C1210C221JGGACTU Kemet CAP CER 220PF 2KV 5 NP0 1210 SMD C1210 26 CON1 HVDC 7808 Skystone female M5 30A 6P MECH 27 CON2 GND 7808 Skysto...

Page 18: ...MD R4524 64 R26 10R S4 10RF1 Riedon RES 10 OHM 2W 1 WW SMD SMD R4524 65 TP1 Vg_LS 546 4027 RS BNC socket female MECH 66 TP2 V_Ig_LS1 5020 keystone round 1pin test point MECH 67 TP3 V_Ig_LS2 5020 keystone round 1pin test point MECH 68 TP4 Vd_HS 546 4027 RS BNC socket female MECH 69 TP5 Vg_HS 546 4027 RS BNC socket female MECH 70 TP6 Vd_LS 546 4027 RS BNC socket female MECH 71 TP7 V_Ig_HS1 5020 keys...

Page 19: ...19 KIT8020CRD8FF1217P 1_UM Rev User Manual 83 ZD5 5 1V 5 1V 350mW 1 SMD SOD 123 84 ZD6 5 1V 5 1V 350mW 1 SMD SOD 123 85 ZD7 25V 25V 350mW 2 SMD SOD 123 86 ZD8 25V 25V 350mW 2 SMD SOD 123 ...

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