CEB-V850ES/FJ3·SJ3 Evaluation Board HardwareUser’s Manual
16
3.3.7 RESET
(1) RESET
overview
When the time of power on or SW4 are pushed, reset starts a board.
It is a RESET signal at the MINICUBE or FL-PR4 or FL-PR5 use and MINICUBE2 use time, and
composition differs.
A reset signal block diagram is shown below.
MIN IC U BE2
/ R ESin
R e sista n ce fo r
lo g ic sta b le
11
12
13
14
15
16
VDD2
FLMD1
RFU-1
FLMD0
(/ RESin)
NC
FJ 3/ SJ 3 MINICUBE · FL- PR4 / FL-PR5 / MINICUBE 2 connection
CN
5
FL-PR4 / FL-PR5 / MMINICUBE 2 connector
1
2
3
4
5
6
7
8
9
10
GND
/ RESout
SI/ RXD
VDD
SO / TXD
VPP
SCK
H/ S
CLK
VDE
CN 6
MINICUBE
A 7
A 8
A 9
A 10
A 11
A 12
A 13
DDI
DCK
DMS
DDO
/ DRST
/ RESET
FLMD0
MINICUBE , FL- PR4, FL -PR5 and
MINICUBE 2 are promised on
exclusion use, respectively.
(/ RESET signal is communalized )
C- POW
( Reset signal block diagram)
P 30/ TXD0
P 31/ RXD0
FLMD0
FLMD1
/ RESET
DDI
DCK
DMS
DDO
/ DRST
V 850FJ 3 /SJ 3
P62
C- POW
Short pin
2 -3
1- 2
1 - 2
1 - 2
Select
A
B
B
B
Connection apparatus
MINICUBE 2
MINICUBE
FL-PR4
FL-PR5
MINICUBE 2
FL - PR4, FL -PR5
MINICUBE
The flow of a reset signal
A
Y
B
A/ B
_
A
B
Y
A / B
_
C -POW
C -POW
Nothing
1- 2
B
FL- PR4 / FL -PR5 /
MINICUBE 2 connector
SW4
JP7
Figure 3.3.7(1)
