manualshive.com logo in svg

Corvalent Q35SBC, User Manual, Page: 52 / 61

Share
Download
Corvalent Q35SBC User Manual Download Page 52

 

Appendix C Flash BIOS Programming and Codes 

The Q35SB offers the standard FLASH BIOS. When installed, you will be able to update your BIOS 
without having to replace the EEPROM. The AMIBIOS8 will read the new BIOS file from a floppy 
disk during boot and replace the old BIOS. When updating your BIOS, make sure you have a disk 
with the correct BIOS file (its size should be 8Mb (512kB)). 

How to Reflash the BIOS

 

Insert a floppy containing AMIBOOT.ROM into floppy A: Please never turn the power off while 
reprogramming a FLASH BIOS. While powering on, press CTRL-Home simultaneously. The board 
will reboot after completion. You can also follow the process through the POST codes on Table B-2. 

Alternatively the software AFUDOS can be used to reflash the BIOS. 

Troubleshooting POST 

AMIBIOS8 writes progress codes, also known as POST codes, to I/O port 80h during POST, in order 
to provide information to OEM developers about system faults. These POST codes may be 
monitored by the On-board POST Display. 

Table B-1 Boot block Initialization Code Checkpoints 

The Boot block initialization code sets up the chipset, memory and other components before system 
memory is available.  The following table describes the type of checkpoints that may occur during the 
boot block initialization portion of the BIOS: 

Checkpoint Description 

Before D0 

If boot block debugger is enabled, CPU cache-as-RAM functionality is enabled at this 
point.  Stack will be enabled from this point. 

D0 

Early Boot Strap Processor (BSP) initialization like microcode update, frequency and 
other CPU critical initialization.  Early chipset initialization is done.   

D1 

Early super I/O initialization is done including RTC and keyboard controller.  Serial port is 
enabled at this point if needed for debugging.  NMI is disabled.  Perform keyboard 
controller BAT test. Save power-on CPUID value in scratch CMOS. Go to flat mode with 
4GB limit and GA20 enabled. 

D2 

Verify the boot block checksum.  System will hang here if checksum is bad. 

D3 

Disable CACHE before memory detection.  Execute full memory sizing module.  If 
memory sizing module not executed, start memory refresh and do memory sizing in Boot 
block code.  Do additional chipset initialization.  Re-enable CACHE.  Verify that flat mode 
is enabled. 

D4 

Test base 512KB memory.  Adjust policies and cache first 8MB.  Set stack. 

D5 

Boot block code is copied from ROM to lower system memory and control is given to it.  
BIOS now executes out of RAM.  Copies compressed boot block code to memory in right 
segments. Copies BIOS from ROM to RAM for faster access.  Performs main BIOS 
checksum and updates recovery status accordingly. 

52 

Summary of Contents for Q35SBC

Page 1: ... Q35SBC USER MANUAL Part Number Q35SB ...

Page 2: ...ensions 10 Environmental Requirements 10 CHAPTER 2 HARDWARE CONFIGURATION 11 Handling Precautions 11 Connector Locations 12 Header and Jumper Locations 13 Jumpers Connectors and Headers Quick Reference Table 14 Setting the Jumpers 15 Installing Memory 17 Installing the CPU 18 Installing FAN s 20 Installing Power Cables 21 Back Panel Connections 22 Header Connectors 23 CHAPTER 3 AMIBIOS SETUP 29 St...

Page 3: ...uration Map 48 Interrupt Map 49 Graphics Features 50 APPENDIX B PICMG1 0 51 APPENDIX C FLASH BIOS PROGRAMMING AND CODES 52 How to Reflash the BIOS 52 Troubleshooting POST 52 Critical Error BEEP Codes 58 Boot Block Beep Codes 58 POST BIOS Beep Codes 58 Troubleshooting POST BIOS Beep Codes 59 3 ...

Page 4: ... or misuse of this publication This publication and any accompanying software may not in whole or in part be copied photocopied translated or reduced to any machine readable form without prior consent from the vendor manufacturer or creators of this publication except for copies kept by the user for backup purposes Brand and product names mentioned in this publication may or may not be copyrights ...

Page 5: ...GA4 With proper installation and maintenance your board will provide years of high performance and trouble free operation This manual provides a detailed explanation into the installation and use of the Q35SB industrial embedded motherboard It is written for the novice PC user installer However as with any major computer component installation previous experience is helpful and should you not have...

Page 6: ...rmful interference when the equipment is operated in a commercial environment This equipment generates uses and can radiate radio frequency energy and if not installed and used in accordance with the instruction manual may cause harmful interference to radio communications Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be requi...

Page 7: ...1333 MHz FSB 45nm Intel Core 2 Duo E7400 3M cache 2 80GHz 1066 MHz FSB 45nm Intel Core 2 Duo E6400 2M cache 2 13GHz 1066 MHz FSB 65nm Intel Core 2 Duo E5300 2M cache 2 60GHz 800 MHz FSB 45nm Intel Core 2 Duo E4300 2M cache 1 80GHz 800 MHz FSB 65nm Intel Dual Core E2160 1M cache 1 80GHz 800 MHz FSB 65nm Intel Celeron E1500 512K cache 2 20GHz 800 MHz FSB 45nm Intel Celeron 440 512K cache 2 00GHz 800...

Page 8: ... Chips Two full handshake COM ports COM2 configurable to RS 232C RS 422 or RS 485 IRDA on 5 pin header Floppy Combined PS 2 keyboard mouse Hardware voltage monitor CPU temp monitor Watchdog timer PWM fan control outputs tachometer inputs ITE IT8718F SIO chip Monitors thermal diode of CPU PCI E Gigabit Ethernet controller 10 100 1000 Mbps full and half duplex operation Realtek 8111B PCI E x 1 inter...

Page 9: ...ck I O USB Interfaces 12 10 USB ports on 5x10 pin keyed headers Keyboard Mouse Port Combined PS 2 compatible 6 pin mini DIN connector on I O back panel Additional I O 4 bit digital Input 4 bit Digital Output header Video Support DB 15 VGA connector on I O back panel Maximum resolution 2048x1536 75Hz Audio External optional audio module with CODEC Miscellaneous RTC integrated in ICH9 with lithium b...

Page 10: ...Optional TPM module capability Form Factor and Dimensions PICMG 13 3 X 4 8 338 x 122mm Environmental Requirements RoHS compliant assembly CATEGORY OPERATING NON OPERATING TEMPERATURE 0 C to 60 C 40 C to 70 C HUMIDITY 5 to 95 40 C non condensing 5 to 95 40 C non condensing ...

Page 11: ...e board unusable Always handle the Q35SB with care Special Warranty Note Products returned for warranty repair will be inspected for damage caused by improper installation and misuse as described in the previous section and the static warning below Should the board show signs of abuse the warranty will become void and the customer will be billed for all repairs and shipping and handling costs Stat...

Page 12: ...Connector Locations KB Mouse KBM1 Ethernet LAN1 VGA VGA1 USB1 COM2 DIMM2 DIMM1 Floppy FDD1 IDE1 COM1 ATX12V ATX12V1 SATA2 SATA1 Dig IO DIO1 12 ...

Page 13: ...Jumper Locations IDE Enable JP1 System Fan SYSF2 System Fan SYSF1 CPU Fan CPUF1 Front Panel JFRT1 ATX Power EATX1 CMOS JBAT1 USB6 5 4 3 and 2 AT ATX AT1 Ext KB EKB1 IR IR1 COM2 MODE JRS1 TPM TPM1 Ext Audio CN3 13 ...

Page 14: ... header SYSF1 System Fan1 3 pin connector SYSF2 System Fan2 3 pin connector TPM1 Trusted Platform Module 20 pin header USB2 6 USB Port 10 pin keyed header Connectors Name Description ATX12V1 ATX12V CPU Power Connector 4 pin connector COM1 COM1 10 pin shrouded header COM2 COM2 14 pin shrouded header DIO1 Digital I O 10 pin shrouded header FDD1 Floppy Disk 34 pin shrouded header IDE1 PATA IDE 40 pin...

Page 15: ...vers the pins B Three or four pin jumpers are used for multiple selections Instructions for these jumpers will indicate which two pins to cover For example for JPx 2 3 the shunt will be covering pins 2 and 3 leaving pins 1 and 4 exposed How to identify pin number 1 on Figure Looking to the solder side The board side with fewer components of the PCB Printed Circuit Board pin number 1 will have a sq...

Page 16: ...ion of the power type Default is ATX open CMOS Reset JBAT1 This option is provided as a convenience for those who need to reset the CMOS registers It should always be set to Normal 1 2 for standard operation If the CMOS needs to be reset turn off the system move JBAT1 to 2 3 and back to 1 2 and power the system on PATA IDE Enable Disable JP1 This option enables disables the PATA controller Default...

Page 17: ...F 13 14 OFF OFF ON Installing Memory This motherboard provides two 240 pin MEMORY MODULES DIMM sockets for DDR2 memory Sockets can be populated with a minimum of 128MB up to a maximum memory of 4GB Valid Memory Configurations Bank 240 Pin DIMM PCS Total Memory Bank 0 1 DIMM1 DDR2 667 DDR2 800 X1 128MB 2 0GB Bank 2 3 DIMM2 DDR2 667 DDR2 800 X1 128MB 2 0GB Total System Memory Max 4 0GB X2 128MB 4 0G...

Page 18: ...ty 2 Always handle the CPU by the edges never touch the pins or pads 3 Always use a heat sink and a CPU fan To properly install the processor make sure to carefully follow these instructions 1 Open the socket lever by pushing the lever down and away from the socket 2 Lift the metal plate and make sure not to touch the socket pins 18 ...

Page 19: ...e picture Align the processor with the socket A Align the processor notches B with the socket C Insert the processor into the socket without tilting 5 Press down on the load plate A close and return the socket lever B to its original position 6 The plastic socket cover should pop off at this point Make sure to store it for future use 19 ...

Page 20: ...fan s plug to the board taking into consideration the polarity of connector PIN ASSIGNMENT 1 GND 2 12V 3 Tachometer 4 PWM Be sure that there is sufficient air circulation across the processor s heat sink and CPU cooling FAN is working correctly otherwise it may cause the processor and motherboard to overheat and damage You may install an auxiliary cooling FAN if necessary 8 20 ...

Page 21: ...f connector PIN ASSIGNMENT 1 GND 2 12V 3 Tachometer Installing Power Cables The Q35SB is powered through 3 connectors the PICMG1 0 edge connector the backplane EATX1 and ATX12V1 The edge connector provides most of the system voltages like 12V 12V 5V and 3 3V ATX12V1 provides 12V to power the processor CPU Power ATX12V1 PIN ASSIGNMENT PIN ASSIGNMENT 3 12V 4 12V 1 GND 2 GND 21 ...

Page 22: ...y 2 GND 1 PS ON Back Panel Connections PS 2 Mouse Keyboard Connector KBM1 The combo mini DIN connector combines the keyboard and mouse A splitter cable is available VGA Connector 15 pin D Sub Connector VGA1 The 15 pin D Subminiature female connector supports analog displays LAN Port connector LAN1 This connector is a standard GbE RJ45 Ethernet port Dual USB Port connectors USB1 These connectors ar...

Page 23: ...devices It is preferable to use SATA II certified cables These cables easily connect to the motherboard and the SATA peripheral External Audio CN3 The optional AUDIO Daughter board gets connected to this header PIN ASSIGNMENT 1 12V 2 3 3V 3 AC_SYNC 4 AC_SDOUT 5 GND 6 AC_BCLK 7 GND 8 AC_RST 9 AC_SDIN0 23 ...

Page 24: ...rive After connecting the single plug end to motherboard make sure to connect the drive to the connector at the end of the cable PATA IDE Connector IDE1 Use this connector with a standard 40 pin 80 wire IDE cable Serial Port 1 COM1 PIN ASSIGNMENT PIN ASSIGNMENT 10 GND 9 GND 8 RI 7 DTR 6 CTS 5 TX 4 RTS 3 RX 2 DSR 1 DCD 2 1 24 ...

Page 25: ...D 8 RI 7 DTR 6 CTS 5 TX 4 RTS 3 RX 2 DSR 1 DCD 2 1 USB Port Headers USB2 USB3 USB4 USB5 and USB6 The headers are used for additional USB connectivity By attaching optional USB cables your will have 10 additional USB ports PIN PIN ASSIGNMENT 1 2 VCC 3 4 D0 5 6 D1 7 8 GND 9 10 KEY N C 25 ...

Page 26: ...ional wireless transmitting and receiving infrared module You must configure the setting through the BIOS setup to use the IR function PIN ASSIGNMENT 1 5V 2 N C 3 IRRX 4 GND 4 IRTX 1 4 External Keyboard EKB1 PIN ASSIGNMENT 5 5V 4 GND 3 N C 2 KBDATA 1 KBCLK 5 1 26 ...

Page 27: ...DI3 7 DO3 6 DI2 5 DO2 4 DI1 3 DO1 2 DI0 1 DO0 2 1 Trusted Platform Module TPM1 PIN ASSIGNMENT PIN ASSIGNMENT 1 CLK 2 GND 3 LFRAME 4 N C 5 LRESET 6 N C 7 LAD3 8 LAD2 9 3 3V 10 LAD1 11 LAD0 12 GND 13 N C 14 N C 15 3 3V_SB 16 SERIRQ 17 GND 18 CLKRUN 19 PD 20 N C 27 ...

Page 28: ...t Panel Header JFRT1 PIN ASSIGNMENT PIN ASSIGNMENT 1 Power LED 2 Power Switch 3 GND 4 Power Switch 5 GND 6 RESET 7 HDD LED 8 RESET 9 HDD LED 10 Speaker 11 SMBCLK 12 Speaker 13 SMBDATA 14 GND 15 GND 16 5V 28 ...

Page 29: ...uld a critical error be encountered therefore POST uses beeps on the speaker to indicate the failure of a critical system component during this time Consult Appendix B for a list of Beep codes used by the BIOS Starting BIOS Setup AMIBIOS has been integrated into many motherboards for over a decade In the past people often referred to the AMIBIOS setup menu as BIOS BIOS setup or CMOS setup To enter...

Page 30: ...n and so on Up Down The Up and Down Arrow keys allow you to select an setup item or sub screen Plus Minus The Plus and Minus Arrow keys allow you to change the field value of a particular setup item For example Date and Time Tab The Tab key allows you to select setup fields Note The F8 key on your keyboard is the Fail Safe key It is not displayed on the key legend by default To set the Fail Safe s...

Page 31: ...guration and exit You can also use the Arrow key to select Cancel and then press the Enter key to abort this function and return to the previous screen ESC The Esc key allows you to discard any changes you have made and exit the Setup Press the Esc key to exit the setup without saving your changes The following screen will appear Press the Enter key to discard changes and exit You can also use the...

Page 32: ...tem Date using the Arrow keys Enter new values through the keyboard Press the Tab key or the Arrow keys to move between fields The date must be entered in MM DD YY format The time is entered in HH MM SS format Note The time is in 24 hour format For example 5 30 A M appears as 05 30 00 and 5 30 P M as 17 30 00 BIOS SETUP UTILITY Main Advanced PCIPnP Boot Security Chipset Exit System Overview AMIBIO...

Page 33: ...tting wrong values in below Sections may cause system to malfunction CPU Configuration IDE Configuration Floppy Configuration Super IO Configuration Hardware Health Configuration ACPI APM Configuration Remote Access Configuration USB Configuration Configure CPU Select Screen Select Item Enter Go to Sub Screen F1 General Help F10 Save and Exit ESC Exit V02 61 Copyright 1985 2006 American Mega trend...

Page 34: ...er Not Detected Secondary IDE Master Not Detected Third IDE Master Not Detected Floppy Configuration Settings This screen allows the user to select the Floppy drive configuration Floppy Drive A Disabled 360KB 1 2MB 1 44MB and 2 88MB Super I O Configuration Screen Onboard Floppy Controller Set this option to enable to enable the floppy drive controller on the motherboard The settings are Enabled an...

Page 35: ...e CPU Fan Mode Setting Full On mode ACPI APM Configuration Screen ACPI Configuration ACPI Aware O S Yes or No APM Configuration Power Management APM Enable or Disable Power Button Mode Delay 4secs or On Of Restore on AC Loss Power ON OFF or Last State Advanced Resume Event Controls Resume on RING Enable or Disable Resume on PME Enable or Disable Resume on RTC Alarm Enable or Disable 35 ...

Page 36: ...S POST Disable Turn off the redirection after POST Boot Loader Redirection is active during Boot loader Always Redirection is always active some OS s may not work if set to always Terminal Type ANSI VT100 or VT UTF8 UT UTF8 Combo Key Support Enables or Disables UT UTF8 Support Sredir Memory Display Delay Delay in seconds to display memory information USB Configuration Legacy USB Support Auto Enabl...

Page 37: ...read Spectrum Disabled IRQ3 Available IRQ4 Available IRQ5 Available IRQ7 Available IRQ9 Available IRQ10 Available IRQ11 Available IRQ14 Available IRQ15 Available DMA Channel 0 Available DMA Channel 1 Available DMA Channel 3 Available DMA Channel 5 Available DMA Channel 6 Available DMA Channel 7 Available Reserved Memory Size Disabled Clear NVRAM during System Boot Select Screen Select Item Change ...

Page 38: ...ocated to a PCI VGA adapter card PCI IDE Bus Master Set this value to select IDE PCI bus mastering Clock Spread Spectrum Select spread spectrum function to address EMI concerns IRQ3 15 Select if the IRQ will be available for PCI or Reserved for ISA DMA0 7 Select if the DMA channel will be available for PCI or Reserved for ISA Reserved Memory Size Set this value to allow the system to reserve memor...

Page 39: ...ect Screen Select Item Enter Go to Sub Screen F1 General Help F10 Save and Exit ESC Exit V02 61 Copyright 1985 2006 American Mega trends Inc Boot Settings Configuration Quick Boot Set this value to boot normal or fast skipping some POST tests Boot up Num Lock Select the status of NUM LOCK on boot Interrupt 19 Capture Allows Option ROMs to trap Interrupt 19 for cards that have ROM based setup utili...

Page 40: ...ives Removable media or ATAPI CD ROM devices from the boot menu For example if the 1st boot device is set to Hard disk drives then BIOS will try to boot to hard disk drives first Note When you select a boot category from the boot menu a list of devices in that category appears For example if the system has three hard disk drives connected then the list will show all three hard disk drives attached...

Page 41: ...upport you are prompted for a one to six character password Type the password on the keyboard The password does not appear on the screen when typed Make sure you write it down If you forget it you must drain NVRAM and reconfigure BIOS SETUP UTILITY Main Advanced PCIPnP Boot Security Chipset Exit Security Settings Supervisor Password Not Installed User Password Not Installed Change Supervisor Passw...

Page 42: ...been installed Installed displays If not Not Installed displays User Password Indicates whether a user password has been set If the password has been installed Installed displays If not Not Installed displays Change Supervisor Password Select this option and press Enter to access the sub menu You can use the sub menu to change the supervisor password Change User Password Select this option and pre...

Page 43: ...ve and Exit ESC Exit V02 61 Copyright 1985 2006 American Mega trends Inc Northbridge Configuration DRAM Frequency Configures the memory speed automatically or manually Configure DRAM Timing by SPD Configures the memory timing automatically SPD or manually Initiate Graphic Adapter Selects the primary graphic controller Internal Graphics Mode Select Selects the amount of system memory to be allocate...

Page 44: ...ount of available USB ports USB Port Configure Selects 6x6 or 8x4 USB 2 0 Controller Enables and disables USB2 0 controller HDA Controller Configures the onboard AUDIO Controller default disabled SLP_S4 Min Assertion Width Select 1 2 2 3 3 4 and 4 5 seconds 44 ...

Page 45: ...er so the new system configuration parameters can take effect Exit Discarding Changes Select this option to quit the CMOS Setup without making any permanent changes to the system configuration Load Optimal Defaults This option automatically sets all CMOS Setup options to a complete set of default settings The Optimal settings are designed for maximum and stable system performance Load FailSafe Def...

Page 46: ...ATH COPROCESSOR 00000170 00000177 SECONDARY IDE 000001F0 000001F7 PRIMARY IDE 00000274 00000277 ISAPNP READ DATA PORT 00000279 00000A79 ISAPNP CONFIGURATION 000002F8 000002FF COM2 IF ENABLED 00000376 00000376 SECONDARY IDE 000003B0 000003BF MDA MGA 000003C0 000003CF EGA VGA 000003D4 000003D9 CGA CRT REGISTER 000003F0 000003F7 FLOPPY CONTROLLER 000003F6 000003F6 PRIMARY IDE 000003F8 000003FF COM1 I...

Page 47: ...APTER ROMS 640K 800K A0000 C7FFF 160K VIDEO MEMORY AND BIOS 639K 640K 9FC00 9FFFF 1K EXTENDED BIOS DATA 512K 639K 80000 9FBFF 127K EXTENDED CONVENTIONAL MEMORY 0K 512K 00000 7FFFF 512K CONVENTIONAL MEMORY DMA Channels DMA NUMBER DATA WIDTH RESOURCE 0 8 16 1 8 16 PARALLEL PORT 2 8 16 FLOPPY DRIVE 3 8 16 PARALLEL PORT 4 8 16 DMA 5 16 6 16 7 16 PCI Routing Table Q35SB ISEL IRQx PCI Slot 1 AD31 B PCI ...

Page 48: ...A 01 2938 USB 00 1A 02 2939 USB 00 1A 07 293C USB2 00 1B 00 293E AUDIO 00 1C 00 2940 PCI TO PCI 00 1D 00 2934 USB 00 1D 01 2935 USB 00 1D 02 2936 USB 00 1D 07 293A USB2 00 1E 00 244E PCI BRIDGE 00 1F 00 2918 ISA BRIDGE 00 1F 02 2921 IDE 00 1F 03 2930 SMBUS 00 1F 05 2926 SATA 01 00 00 8168 ETHERNET 02 06 00 8888 ISA BRIDGE 48 ...

Page 49: ...cations Port COM2 4 9 Communications Port COM1 5 6 Optional LPT2 6 11 Floppy Disk Controller 7 7 Printer Port LPT1 8 N A System CMOS Real Time Clock 9 10 ACPI Mode when enabled 10 3 Available 11 2 Available 12 4 PS 2 Compatible Mouse Port 13 N A Numeric Data Processor 14 5 Prim SATA Channel 15 1 Sec SATA Channel 16 23 APIC only 49 ...

Page 50: ...tilization DVMT ensures the most efficient use of available system memory for maximum 2 D 3 D graphics performance Up to 224 MB of system memory can be allocated to DVMT on systems that have 512 MB or more of total system memory installed Up to 128 MB can be allocated to DVMT on systems that have 256 MB but less than 512 MB of total installed system memory Up to 64 MB can be allocated to DVMT when...

Page 51: ...rom 0 062 material is thin enough and large enough to flex when inserting plug in boards This flexure can and often does break small traces and solder joints on fine pitch surface mount devices Replacing a motherboard requires complete disassembly removing all cards and cables from the system Downtime ranges from 30 minutes to several hours This is unacceptable for many critical industrial or tele...

Page 52: ...of checkpoints that may occur during the boot block initialization portion of the BIOS Checkpoint Description Before D0 If boot block debugger is enabled CPU cache as RAM functionality is enabled at this point Stack will be enabled from this point D0 Early Boot Strap Processor BSP initialization like microcode update frequency and other CPU critical initialization Early chipset initialization is d...

Page 53: ... Recovery Code Checkpoints The Boot block recovery code gets control when the BIOS determines that a BIOS recovery needs to occur because the user has forced the update or the BIOS checksum is corrupt The following table describes the type of checkpoints that may occur during the Boot block recovery portion of the BIOS Checkpoint Description E0 Initialize the floppy controller in the super I O Som...

Page 54: ...OS checksum is bad update CMOS with power on default values and clear passwords Initialize status register A Initializes data variables that are based on CMOS setup questions Initializes both the 8259 compatible PICs in the system 05 Initializes the interrupt controlling hardware generally PIC and interrupt vector table 06 Do R W test to CH 2 count reg Initialize CH 0 as system timer Install the P...

Page 55: ...tion setup key message and any OEM specific information 38 Initializes different devices through DIM See DIM Code Checkpoints section of document for more information USB controllers are initialized at this point 39 Initializes DMAC 1 DMAC 2 3A Initialize RTC date time 3B Test for total memory installed in the system Also Check for DEL or ESC keys to limit memory test Display total memory in the s...

Page 56: ... typically INT19h Table B 4 DIM Code Checkpoints The Device Initialization Manager DIM gets control at various times during BIOS POST to initialize different system busses The following table describes the main checkpoints where the DIM module is accessed Checkpoint Code Description 2A Initialize different buses and perform the following functions Reset Detect and Disable function 0 Static Device ...

Page 57: ...func 5 general device initialization on the BUS concerned 6 func 6 error reporting for the BUS concerned 7 func 7 add on ROM initialization for all BUSes 8 func 8 BBS ROM initialization for all BUSes The lower nibble Y indicates the BUS on which the different routines are being executed Y can be from 0 to 5 0 Generic DIM Device Initialization Manager 1 On board System devices 2 ISA devices 3 EISA ...

Page 58: ...lash Programming successful 5 File read error 6 Keyboard controller BAT command failed 7 No Flash EPROM detected 10 Flash Erase error 11 Flash Program error 12 AMIBOOT ROM file size error 13 BIOS ROM image mismatch file layout does not match image present in flash device POST BIOS Beep Codes Number of Beeps Description 1 Memory refreshes timer error 3 Base memory read write test error 6 8042 Gate ...

Page 59: ... cards except the video adapter If beep codes are generated when all other expansion cards are absent consult your system manufacturer s technical support If beep codes are not generated when all other expansion cards are absent one of the add in cards is causing the malfunction Insert the cards back into the system one at a time until the problem happens again This will reveal the malfunctioning ...

Page 60: ...m CPU Central Processing Unit also known as Processor DDR Double Data Rate Transfer mode between memory and computer DVMT Dynamic Video Memory Technology GMCH Graphic Memory Controller Hub ICH Controller Hub or Southbridge UMA Unified Memory Architecture RAID Redundant Array of Inexpensive Drives 60 ...

Page 61: ...MN Q35SB 01 ...

Reviews:

No comments