6. About Hardware
CNT32-4MT(LPCI)
75
Block Diagram
CH3
Bus
Master
Control
Logic
FIFO
CH0
Command setting register
Counter read register
32 bit counter
Initial value storage register
Comparison setting register
Sig
n
al
select
or/
dig
it
al
fil
ter
Each control register
Sampling control
CH2
External control signal
Direct Read
Un
isola
ted
L
V
T
T
L
le
ve
l s
ig
na
l in
pu
t
PCI
B
u
s
In
te
rf
ac
e
Figure 6.1. Block Diagram