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SA70m01
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Table 19 SPI0 Signal Descriptions
Signal
Pin #
Description
I/O
PU/PD
Comment
SPI0_CS0#
P43
SPI0 master chip select 0 output for selecting SPI boot device
O 1.8V
PU 100k
SPI0_CS1#
P31
SPI0 master chip select output for selecting the second chip select when two
devices are used. Do not use when only one SPI device is used
O 1.8V
SPI0_CK
P44
SPI0 master clock output
O 1.8V
PD 75k
SPI0_DIN
P45
SPI0 master data input (SPI serial input data from the SPI device to SMARC
®
module)
I 1.8V
SPI0_DO
P46
SPI0 master data output (SPI serial output data from SMARC
®
module to the SPI
device
O 1.8V
PU 20k
Note
The conga-SA7 supports only the BIOS SPI flash memory on the SPI0 bus.
Table 20 eSPI/SPI1 Signal Descriptions
Signal
Pin #
Description
I/O
PU/PD
Comment
ESPI_CK
P56
ESPI master clock output. This pin provides the reference timing for all the serial
input and output operations
O 1.8V
ESPI_CS0#
P54
ESPI master chip selet outputs. Driving Chip Select# low selects a particular
eSPI slave for the transaction. Each of the eSPI slaves is connected to a
dedicated Chip Select# pin
O 1.8V
ESPI_CS1#
P55
ESPI_IO_0
P58
ESPI master data input/outputs. These bi-directional input/output pins are used
to transfer data between master and slaves. In single I/O mode, ESPI_IO_0 is
the eSPI master output/eSPI slave input (MOSI) whereas ESPI_IO_1 is the eSPI
master input/eSPI slave output (MISO)
I/O 1.8V
ESPI_IO_1
P57
ESPI_IO_2
S56
ESPI_IO_3
S57
ESPI_RESET#
S58
Resets the eSPI interface for both master and slaves. ESPI_RESET# is typically
driven from eSPI master to eSPI slaves
O 1.8V
PD 75k
ESPI_ALERT0# S43
This pin is used by eSPI slave to request service from eSPI master. Alert# is an
open-drain output from the slave. This pin is optional for single master-single
slave configuration where I/O[1] can be used to signal the alert event
I 1.8V
ESPI_ALERT1# S44
PU 100k 1.8V
Note
The conga-SA7 supports only general purpose devices on the eSPI/SPI1 bus.
