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2017
congatec
AG
MA50m17
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5.10
LPC Bus
The conga-MA5 offers the LPC (Low Pin Count) bus. The LPC bus corresponds approximately to a serialized ISA bus yet with a significantly
reduced number of signals and functionality. Due to the software compatibility to the ISA bus, I/O extensions such as additional serial ports
can be easily implemented on an application specific carrier board using this bus. Only certain devices such as Super I/O or TPM chips can be
implemented on the carrier board.
Note
The LPC clock frequency is 25 MHz. The LPC_DRQ# signal is not supported. The SERIRQ# signal is programmable to operate with the cBC.
5.11
SPI Bus
The module integrates a 8 MByte SPI Flash device with SFDP feature for the UEFI BIOS. Optionally, the onboard SPI Flash can be disabled and
a carrier board based 3V 8 MByte SPI Flash device with SFDP feature (e.g. W25Q64FVSSIG) can be utilized to boot the module. The SPI clock
speed is 25 MHz.
5.12
I²C Bus
The I²C bus is implemented through the congatec board controller. The bus has 2.2k ohm pull-ups resistors on the CLK and DATA signals and
is powered from standby 3.3V.
5.13
SMBus
The SM Bus is implemented through the congatec board controller. It is an I²C bus variant for system management functions. The bus is
powered from standby 3.3V and has 2.2k ohm pull-ups resistors on the CLK and DATA signals. ALERT# signal has a 10K-ohm pull-up resistor.
Optionally, this SM Bus can be connected to the SoC SMBus via an isolation switch controlled in BIOS.
5.14
Power Control
PWR_OK
Power OK from main power supply or carrier board voltage regulator circuitry. A high value indicates that the power is good and the module
can start its onboard power sequencing. Carrier board hardware must drive this signal low until all power rails and clocks are stable. Releasing
PWR_OK too early or not driving it low at all can cause numerous boot up problems. It is a good design practice to delay the PWR_OK signal
a little (typically 100ms) after all carrier board power rails are up, to ensure a stable system. See screenshot below.
