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RCIM User’s Guide

B-2

0xXXX01010
0xXXX10010

Tick Clock Status/Control
Tick Clock Status/Control

0xXXX01100
0xXXX10100

POSIX Clock Seconds
POSIX Clock Seconds

0xXXX01108
0xXXX10108

POSIX Clock Nanoseconds
POSIX Clock Nanoseconds

0xXXX01110
0xXXX10110

POSIX Clock Status/Control
POSIX Clock Status/Control

0xXXX01114
0xXXX10114

POSIX Clock Skip/Add Time
POSIX Clock Skip/Add Time

(Write Only)
(Write Only)

0xXXX01120
0xXXX10120

Clock Frequency Adjust Register
Clock Frequency Adjust Register

0xXXX02000

RTC #0 Control

0xXXX02010

RTC #0 Timer

0xXXX02014

RTC #0 Repeat

0xXXX02020

RTC #1 Control

0xXXX02030

RTC #1 Timer

0xXXX02034

RTC #1 Repeat

0xXXX02040

RTC #2 Control

0xXXX02050

RTC #2 Timer

0xXXX02054

RTC #2 Repeat

0xXXX02060

RTC #3 Control

0xXXX02070

RTC #3 Timer

0xXXX02074

RTC #3 Repeat

0xXXX02080

RTC #4 Control

0xXXX02090

RTC #4 Timer

0xXXX02094

RTC #4 Repeat

0xXXX020A0

RTC #5 Control

0xXXX020B0

RTC #5 Timer

0xXXX020B4

RTC #5 Repeat

0xXXX020C0

RTC #6 Control

0xXXX020D0

RTC #6 Timer

0xXXX020D4

RTC #6 Repeat

0xXXX020E0

RTC #7 Control

0xXXX020F0

RTC #7 Timer

0xXXX020F4

RTC #7 Repeat

0xXXX03000
0xXXX30000

Programmable Interrupt Generator
Programmable Interrupt Generator

0xXXX03010
0xXXX30010

Programmable INTR Generator Set
Programmable INTR Generator Set

(Write Only)
(Write Only)

0xXXX03020
0xXXX30020

Programmable INTR Generator Clear
Programmable INTR Generator Clear

(Write Only)
(Write Only)

0xXXX03100

SPI Count Register

0xXXX03200

GPS Receive Pointers

0xXXX03204

GPS Transmit Pointers

0xXXX03208

GPS Debug Control Register

Address

Function

Summary of Contents for RCIM

Page 1: ...Real Time Clock and Interrupt Module RCIM User s Guide 0898007 1000 March 2021...

Page 2: ...e publisher Concurrent Real Time and its logo are registered trademarks of Concurrent Real Time All other Concurrent Real Time product names are trademarks of Concurrent Real Time while all other prod...

Page 3: ...Legacy RCIM User s Guide which can be found in Concurrent s Documentation Library at this location https redhawk concurrent rt com docs Structure of Manual This manual consists of the following Chapt...

Page 4: ...Brackets enclose command options and arguments that are optional You do not type the brackets if you choose to specify these options or arguments hypertext links When viewing this document online cli...

Page 5: ...ard Illustration 2 8 Connectors and LEDs 2 9 LED Functions 2 9 Input and Output Cables and Connectors 2 10 Oscillators 2 10 GPS Antenna 2 11 External Interrupt I O Connector 2 11 System Identification...

Page 6: ...nput Configuration 3 12 ETI Device Files 3 13 User Interface to ETIs 3 13 Distributed ETIs 3 14 Real Time Clocks RTCs 3 14 RTC Device Files 3 14 Distributed RTCs 3 14 User Interface to RTCs 3 15 Exter...

Page 7: ...cal applications that require rapid response to external events synchronized clocks and or synchronized interrupts When RCIM boards of various systems are chained together an interrupt can be simultan...

Page 8: ...ocal interrupts on the system where the RCIM card is installed When systems are chained together multiple input and output interrupts can be distributed to other RCIM connected systems This allows one...

Page 9: ...r stability 1 0 PPM 2 5 PPM Local Interrupts External Input Interrupts 12 shared inputs and or outputs 3 5V or 5V TTL 12 5V TTL External Output Interrupts 12 5V TTL Real Time Clocks 8 8 Distributed In...

Page 10: ...RCIM User s Guide 1 4...

Page 11: ...information Board Descriptions 1 This section provides illustrations and descriptions of the RCIM IV and RCIM III boards The RCIM boards mount into a standard PCI Express slot on a host system A conne...

Page 12: ...Illustration 1 Figure 2 1 shows the RCIM IV board with optional high stability OCXO Oven Controlled Crystal Oscillator and GPS modules installed Figure 2 1 RCIM IV Board GPS Module Connectors Oven Con...

Page 13: ...ctors is provided in the following sections Figure 2 2 RCIM IV Connectors and LED Locations LED Functions 1 There are two bi colored status LEDs near the input and output connectors on the RCIM IV boa...

Page 14: ...ion Function Output Status LED RED solid 10 MHz clock failure RED 2 sec flash POSIX clock stopped with cable option but cable not synchronized or missing GREEN 1 sec flash POSIX clock running without...

Page 15: ...cable is used it should match the following specifications 50 Ohm impedence 27 dB gain 3 3 volt DC power max 30 ma External Interrupt I O Connector 1 The external interrupt I O connector on the RCIM...

Page 16: ...input sources However future revisions of the RCIM IV will support two programmable input sources DCLS input and an external 10Mhz clock that can be assigned to a physical pin to discipline the maste...

Page 17: ...failing link The serial cables are point to point connections The input cable refers to the cable going upstream towards the master RCIM The output cable is the downstream connection away from the ma...

Page 18: ...ast on the cable it may be lost Transient errors also affect the synchronization of the tick timers since the cable clock will not reach all of the systems Refer to Chapter 3 for instructions for sync...

Page 19: ...tors is provided in the following sections Figure 2 5 RCIM III Connectors and LED Locations LED Functions 1 There are two bi colored status LEDs near the input and output connectors on the RCIM III bo...

Page 20: ...ed and removed with the system containing the RCIM III powered down See the Installa tion section for ESD caution Care should be taken to insure that the SFP modules lock into position and that the RC...

Page 21: ...3 volt DC power max 30 ma External Interrupt I O Connector 1 The external interrupt I O connector on the RCIM III is a Molex LFH 60 Low Force Helix that provides twelve outputs and twelve inputs The e...

Page 22: ...m causing spurious interrupts Since most line drivers can sink more current than they can source the falling edge of the signal will be faster 60 EXT_PIG0 31 GND 59 EXT_PIG1 58 EXT_PIG2 57 EXT_PIG3 56...

Page 23: ...M chain The serial data on the cable includes parity and framing information which allow cable problems to be detected Polling is done continuously and messages that report the status of the RCIM III...

Page 24: ...of an RCIM chain it is best to determine the desired connection mode before installing an RCIM it is easier to connect the optical cable to the cable connectors before the RCIM is installed Note that...

Page 25: ...of integrated circuitry as static discharge can damage circuits Concurrent Real Time strongly recommends that you use an anti static wrist strap and a conductive foam pad when installing or upgrading...

Page 26: ...d are enabled by default in all the pre built RedHawk Linux kernels RCIM This parameter configures the RCIM driver in the kernel It can be configured as a module if desired RCIM_MASTERCLOCK This param...

Page 27: ...driver rcim 0 config This command performs all of the following actions sets the master RCIM hostname to server1 ccur com sets the eti1 edge triggered interrupt to trigger on a rising edge sets the d...

Page 28: ...ired synchronization is faster and synchronization is extremely accurate Interrupts whether operating locally or distributed across an RCIM chain will be processed according to the values configured o...

Page 29: ...128 fudge 127 127 8 0 flag3 1 enable PPS signal The following three lines define a pool of world wide servers that are randomly selected at poweron for time synchronization This feature acts as the de...

Page 30: ...hange the time with the remote server The jitter measures the difference between offset values from the same source The refid indicates where the remote system gets its time The st column is the strat...

Page 31: ...tion fixes Battery backup failed trimble_status machine id 0x5a Battery Powered Time Clock Fault Superpackets supported gps_position_ext XYZ x 1445085 4m y 4476862 4m z 4277122 9m gps_position_ext LLA...

Page 32: ...RCIM User s Guide 2 22...

Page 33: ...e distributed across all RCIM systems in an RCIM chain The open 2 close 2 and ioctl 2 system calls are used to manipulate the interrupts Separate device files are associated with each interrupt The cl...

Page 34: ...nds This clock is incremented on each tick of the common clock signal and the system clock is synchronized to the POSIX clock Setting the system clock for example with clock_settime 2 will set both th...

Page 35: ...e clocks on the RCIM The rcim_clocksync Utility 1 The rcim_clocksync 1 utility can be used to reset the tick clocks on all connected RCIMs to zero to provide a common time stamp across the system This...

Page 36: ...M master This must be configured using the host configuration option see Configuration in Chapter 2 cable signal is one of the following ENABLED DISABLED For the RCIM master indicates if the cable clo...

Page 37: ...ck synchronization is resumed In order for synchronization to resume RedHawk must detect that both the system clock and the RCIM POSIX clock are incrementing that each clock is incrementing at the cor...

Page 38: ...quently each time the slave is booted it will run rcimdate either once or continuously If it is run once then the slave s POSIX clock will match that of the master until such time as some application...

Page 39: ...yd with gpsd to communicate with the GPS receiver This symbolic link is pointed to the last RCIM found with a GPS If another RCIM is to be used the administrator must point this special device to the...

Page 40: ...Generators PIGs A PIG allows you to programmatically generate a signal that can be used to trigger interrupts Documentation for PIGs begins on page 3 16 Distributed Interrupts DIs Distributed interru...

Page 41: ...he host clears the pending bit each time it concludes the processing of an interrupt This clears the way for the RCIM board to output the next instance of this interrupt Arming and Enabling DIs and ET...

Page 42: ...errupt is generated on PIG0 that is passed to an external device via OUT0 Note that the local interrupt does not drive the configured DI An ETI_REQUEST ioctl will cause a local interrupt but will not...

Page 43: ...ion in a form suitable to cut and paste read write interrupts a count of all ETI DI and RTC interrupts per CPU and in total status miscellaneous RCIM board status and time synchronization rawregs name...

Page 44: ...nt the RCIM imposes on external signal generating equipment is that the signals they output must hold any low or high signal value for at least 1 microsecond before changing to the next state Pulses o...

Page 45: ...ng commands to ioctl are used to manipulate the ETIs These commands can also be applied to DIs All ioctl calls use the constants defined in usr include rcim h Refer to the rcim_eti 4 man page for more...

Page 46: ...r periodic if periodic the original load value is automatically reloaded into the counter each time zero is reached In addition to being able to generate an interrupt on the host system the output of...

Page 47: ...e RTCIOCSETCNT sets RTC clock count RTCIOCMODCNT modifies RTC clock count RTCIOCGETCNT gets RTC clock count RTCIOCRES gets RTC clock resolution RTCIOCSTART starts RTC counting RTCIOCSTOP stops RTC cou...

Page 48: ...are a PIG as source for the corresponding output line i e pig0 out0 pig1 out1 etc NOTE On the RCIM IV you cannot specify a pin as an input source to drive the same pin s output For example trying to s...

Page 49: ...state For an RCIM III the duration held must be 1 5 microseconds Distributed PIGs 1 Any or all of the PIGs on an RCIM can be distributed to all systems connected by an RCIM chain The source of a dist...

Page 50: ...be one of the following rtcN real time clock timers pigN programmable interrupt generators inputN edge triggered interrupts etiN alias for edge triggered interrupts gps GPS signal irig IRIG signal non...

Page 51: ...commands to ioctl are used to manipulate distributed interrupts These commands can also be applied to ETIs All ioctl calls use the constants defined in usr include rcim h Refer to the rcim_distrib_in...

Page 52: ...puts before they can be used as sources and pins must be configured as outputs before they can be driven by sources NOTE On the RCIM IV you cannot specify a pin as an input source to drive the same pi...

Page 53: ...r 1 Read Only 0xXXX0002C Interrupt Pending Extra Register 2 Read Only 0xXXX00030 Interrupt Clear Register 1 0xXXX00034 Interrupt Clear Register 2 0xXXX00040 Interrupt Arm Register 1 0xXXX00044 Interru...

Page 54: ...120 0xXXX10120 Clock Frequency Adjust Register Clock Frequency Adjust Register 0xXXX02000 RTC 0 Control Register 0xXXX02010 RTC 0 Timer Register 0xXXX02014 RTC 0 Repeat Register 0xXXX02020 RTC 1 Contr...

Page 55: ...800 Firmware SPI Command Status Register 0xXXX03804 Firmware SPI Address Register 0xXXX03808 Firmware Reload Register 0xXXX0380C Remote Update Sector Status Register 0xXXX03900 0xXXX039FC Firmware SPI...

Page 56: ...94 IRIG Output Control Bits Register 0xXXX06098 IRIG Output SBS Register 0xXXX06100 IRIG ADC Data Register Read Only 0xXXX06110 0xXXX0614C IRIG ADC History Registers Read Only 0xXXX06160 IRIG DAC Data...

Page 57: ...7 6 5 4 3 2 1 0 RCIM Version 0001 R R R Res Cable Clock Stop R W diag Cable Clock Missing R RCIM Mode Bit Values Bits 1 0 Description Input Cable Output Cable Cable Clock 1 1 Stand alone Master RCIM...

Page 58: ...rmation on what options are present on this RCIM board and the firmware revision Offset 00004 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Reserved Reserved Fi...

Page 59: ...lash red and green once per second to identify the specific board useful when there are multiple RCIMs in a one system Clearing bit 7 will resume normal operation Offset 00008 31 30 29 28 27 26 25 24...

Page 60: ...rity registers set polarity high 1 or low 0 for the selected interrupts Offsets 00010 00014 00020 00024 00030 00034 00040 00044 00050 00054 00060 00064 Register 1 Bits 31 30 29 28 27 26 25 24 23 22 21...

Page 61: ...x0E PIG 2 0x0F PIG 3 0x10 Cable Interrupt 0 0x11 Cable Interrupt 1 0x12 Cable Interrupt 2 0x13 Cable Interrupt 3 0x14 Cable Interrupt 4 0x15 Cable Interrupt 5 0x16 Cable Interrupt 6 0x17 Cable Interru...

Page 62: ...0x10 Reserved 0x20 GPS PPS 0x01 Reserved 0x11 Reserved 0x21 IRIG PPS 0x02 Reserved 0x12 Reserved 0x03 Reserved 0x13 Reserved 0x27 Reserved 0x04 RTC 0 0x14 RTC 4 0x28 Edge Interrupt 8 0x05 RTC 1 0x15...

Page 63: ...fset 00200 Figure A 8 RCIM IV GPS PPS Seconds Snapshot Register The GPS PPS Seconds Snapshot register contains a snapshot of the seconds field of the POSIX clock The snapshot is taken every time the G...

Page 64: ...ffset 00210 Figure A 10 RCIM IV Cable Seconds Snapshot Register The Cable Seconds Snapshot register contains a snapshot of the seconds field of the POSIX clock The snapshot is taken every time the cab...

Page 65: ...set 00230 Figure A 12 RCIM IV IRIG PPS Seconds Snapshot Register The IRIG PPS Seconds Snapshot register contains a snapshot of the seconds field of the POSIX clock The snapshot is taken every time the...

Page 66: ...r Time register contains the seconds field of the master RCIM POSIX clock that is transmitted on the cable at every transition of the clock at the seconds boundary Offset 00220 Bits 31 30 29 28 27 26...

Page 67: ...vides detailed hardware status information pertaining to the output cable Offset 00410 Bits 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Clear Cable Errors Bit...

Page 68: ...r contains the upper 32 bits of the tick clock Offsets 01000 10000 Bits 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Reserved Reserved SFP Not Installed SFP Lo...

Page 69: ...register provides status and control of the tick clock Offsets 01010 10010 Bits 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Tick Clock lower 32 bits Bits 31...

Page 70: ...e A 21 RCIM IV POSIX Clock Nanoseconds Register This register contains the POSIX clock nanoseconds Offsets 01108 10108 Bits 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5...

Page 71: ...er This register skips adds time to the POSIX clock in 400 nanosecond increments Offsets 01114 10114 Bits 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Reserved...

Page 72: ...TC Repeat Register for compatibility with RCIM Offsets 02010 02030 02050 02070 02090 020B0 020D0 020F0 Figure A 26 RCIM IV RTC Repeat Registers The RTC repeat registers contain the repeat count value...

Page 73: ...Bits 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Reserved Res Reserved Resolution R W Repeat R W Resolution Bit Values Bits 22 21 20 Description 0 0 0 1 micr...

Page 74: ...rupt Set and Clear Registers Writing to these registers sets clears the unitary bits in the Programmable Interrupt Register without affecting the other bits Offsets 03010 30010 03020 30020 Bits 31 30...

Page 75: ...isters Writing to these registers sets clears the unitary bits in the external I O output enable register without affecting the other bits Offsets 03044 03048 Bits 31 30 29 28 27 26 25 24 23 22 21 20...

Page 76: ...egisters Writing to these registers sets clears the unitary bits in the external I O terminator on register without affecting the other bits Offsets 03054 03058 Bits 31 30 29 28 27 26 25 24 23 22 21 2...

Page 77: ...he GPS transmit pointers are used for communication with the optional GPS module Offset 03204 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Reserved Reserved Bi...

Page 78: ...error register contains information regarding communication errors with the GPS module Any write to this register will reset the communication interface to the GPS module Offset 0320C 31 30 29 28 27...

Page 79: ...e A 39 RCIM IV GPS Transmit Data Buffer This is the GPS transmit data buffer Offset 04800 to 04FFF Bits 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 GPS Receiv...

Page 80: ...RCIM User s Guide A 28...

Page 81: ...Register 1 0xXXX00034 Interrupt Clear Register 2 0xXXX00040 Interrupt Arm Register 1 0xXXX00044 Interrupt Arm Register 2 0xXXX00050 Interrupt Select Level Register 1 0xXXX00054 Interrupt Select Level...

Page 82: ...02050 RTC 2 Timer 0xXXX02054 RTC 2 Repeat 0xXXX02060 RTC 3 Control 0xXXX02070 RTC 3 Timer 0xXXX02074 RTC 3 Repeat 0xXXX02080 RTC 4 Control 0xXXX02090 RTC 4 Timer 0xXXX02094 RTC 4 Repeat 0xXXX020A0 RTC...

Page 83: ...I Registers B 3 0xXXX0320C GPS Communication Error Register 0xXXX03800 0xXXX03FFF SPI Data Buffer 0xXXX04000 0xXXX047FF GPS Receive Data Buffer 0xXXX04800 0xXXX04FFF GPS Transmit Data Buffer Address F...

Page 84: ...8 7 6 5 4 3 2 1 0 RCIM Version 0001 R R R Res Cable Clock Stop R W diag Cable Clock Missing R RCIM Mode Bit Values Bits 1 0 Description Input Cable Output Cable Cable Clock 1 1 Stand alone Master RCIM...

Page 85: ...des information on what options are present on this RCIM board and the firmware revision Offset 000004 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Reserved Re...

Page 86: ...polarity registers set polarity high 1 or low 0 for the selected interrupts Offsets 00010 00014 00020 00024 00030 00034 00040 00044 00050 00054 00060 00064 Register 1 Bits 31 30 29 28 27 26 25 24 23...

Page 87: ...PIG 1 0x0E PIG 2 0x0F PIG 3 0x10 Cable Interrupt 0 0x11 Cable Interrupt 1 0x12 Cable Interrupt 2 0x13 Cable Interrupt 3 0x14 Cable Interrupt 4 0x15 Cable Interrupt 5 0x16 Cable Interrupt 6 0x17 Cable...

Page 88: ...ed 0x10 Reserved 0x20 GPS_PPS 0x01 Reserved 0x11 Reserved 0x21 Reserved 0x02 Reserved 0x12 Reserved 0x03 Reserved 0x13 Reserved 0x27 Reserved 0x04 RTC 0 0x14 RTC 4 0x28 Edge Interrupt 8 0x05 RTC 1 0x1...

Page 89: ...snapshot is taken every time the cable master time is received Offset 00210 Figure B 8 RCIM III Cable Master Time Register The Cable Master Time register contains the seconds field of the master RCIM...

Page 90: ...ovides detailed hardware status information pertaining to the output cable Offset 00410 Bits 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Clear Cable Errors Bi...

Page 91: ...er contains the upper 32 bits of the tick clock Offsets 01000 10000 Bits 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Reserved Reserved SFP Not Installed SFP L...

Page 92: ...s register provides status and control of the tick clock Offsets 01010 10010 Bits 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Tick Clock lower 32 bits Bits 31...

Page 93: ...e B 16 RCIM III POSIX Clock Nanoseconds Register This register contains the POSIX clock nanoseconds Offsets 01108 10108 Bits 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5...

Page 94: ...ter This register skips adds time to the POSIX clock in 400 nanosecond increments Offsets 01114 10114 Bits 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Reserve...

Page 95: ...RTC Repeat Register for compatibility with RCIM Offsets 02010 02030 02050 02070 02090 020B0 020D0 020F0 Figure B 21 RCIM III RTC Repeat Registers The RTC repeat registers contain the repeat count valu...

Page 96: ...0 Bits 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Reserved Res Reserved Resolution R W Repeat R W Resolution Bit Values Bits 22 21 20 Description 0 0 0 1 mic...

Page 97: ...rrupt Set and Clear Registers Writing to these registers sets clears the unitary bits in the Programmable Interrupt Register without affecting the other bits Offsets 03010 30010 03020 30020 Bits 31 30...

Page 98: ...The GPS transmit pointers are used for communication with the optional GPS module Offset 03204 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Reserved Reserved B...

Page 99: ...he GPS communication error register contains counts of communication errors with the GPS module Any write to this register will reset the communication interface to the GPS module Offset 0320C 31 30 2...

Page 100: ...re B 30 RCIM III GPS Transmit Data Buffer This is the GPS trasmit data buffer Offset 04800 to 04FFF Bits 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 GPS Recei...

Page 101: ...the cable each RCIM added to an RCIM chain adds about 200ns of delay in addition to approximately 7ns for each meter of the cable or 200ns per 30 meter cable for a total delay of about 400ns Two syst...

Page 102: ...RCIM User s Guide C 2...

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