Figure 2–2: Window 3 Configuration Registers
Register
Additional Setup Information
2 Register
ZK-1268U-AI
Constant
W3_ASI2
Additional Setup Information
0 Register
W3_ASI0
The following code shows the offset definitions for the registers that are
associated with the window 3 configuration registers:
#define W3_ASI2
0x2
1
#define W3_ASI0
0x0
2
enum w3_asi {
3
ASI_IAS_ISA=0x00040000,
ASI_IAS_PNP=0x00080000,
ASI_IAS_BOT=0x000c0000,
ASI_IAS_NON=0x00000000,
ASI_PAR_35 =0x00000000,
ASI_PAR_13 =0x00010000,
ASI_PAR_11 =0x00020000,
ASI_RS
=0x00000030,
ASI_RW
=0x00000008,
ASI_RSIZE8 =0x00000001,
ASI_RSIZE32=0x00000002
};
1
Defines the offset for the additional setup information register 2.
2
Defines the offset for the additional setup information register 0.
3
Defines an enumerated data type called
w3_asi
. The
if_el
device
driver can assign one of the following values to
w3_ASI2
and
w3_ASI0
(the additional setup information registers):
ASI_IAS_ISA
Activates ISA bus contention.
ASI_IAS_PNP
Activates ISA bus PNP.
ASI_IAS_BOT
Activates ISA bus contention and PNP.
ASI_IAS_NON
Indicates neither ISA nor PNP activation.
ASI_PAR_35
Uses the RAM partition 3 TX to 5 RX (3:5).
ASI_PAR_13
Uses the RAM partition 1 TX to 3 RX (1:3).
ASI_PAR_11
Uses the RAM partition 1 TX to 1 RX (1:1).
ASI_RS
Indicates the RAM speed.
ASI_RW
Indicates the RAM width (which will always
be 0 to 8 bits).
2–8 Defining Device Register Offsets
