Compaq iPAQ 1.0, Technical Reference Manual

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Technical Reference Guide
Compaq iPAQ Series of Desktop Personal Computers
Second Edition - February 2001
5-7
5.4.2 SERIAL TEST INTERFACE
iPAQ 1.x legacy-free and iPAQ 2.0 systems include a serial header connector on the system board
to satisfy the requirements of some operating systems. The test header and pinout is shown in the
following figure:
Figure 5-4. Serial Interface Header (iPAQ 1.2 legacy-free and 2.0 system boards only)
5.4.3 SERIAL INTERFACE PROGRAMMING
Programming the serial interfaces consists of configuration, which occurs during POST, and
control, which occurs during runtime.
5.4.3.1 Serial Interface Configuration
The serial interface must be configured for a specific address range (COM1, COM2, etc.) and also
must be activated before it can be used. Address selection and activation of the serial interface are
affected through the PnP configuration registers of the LPC47B277 I/O controller.
The serial interface configuration registers are listed in the following table:
Table 5–6 . Serial Interface Configuration Registers
Table 5-6.
Serial Interface Configuration Registers
Index
Address Function R/W
30h Activate R/W
60h Base Address MSB R/W
61h Base Address LSB R/W
70h Interrupt Select R/W
F0h Mode Register R/W
NOTE:
Refer to LPC47B277 data sheet for detailed register information.
5.4.3.2 Serial Interface Control
The BIOS function INT 14 provides basic control of the serial interface. The serial interface can
be directly controlled by software through the I/O-mapped registers listed in Table 5-7.
TX Data 5
CD 1
DTR 7
Gnd 9
RX Data 3
2 DSR
6 CTS
8 RI
4 RTS