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Compaq iPAQ 1.0, Technical Reference Manual

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Technical Reference Guide

                                                                Compaq iPAQ Series of Desktop Personal Computers

   

Second Edition - February 2001

ix

LIST OF TABLES

T

ABLE 

1–1.   A

CRONYMS AND 

A

BBREVIATIONS

.......................................................................................... 1-4

T

ABLE 

2-1.   

I

PAQ S

TANDARD 

F

EATURE 

D

IFFERENCE 

M

ATRIX

................................................................... 2-3

T

ABLE 

2-2. 

I

PAQ 1.0/1.2 A

RCHITECTURAL 

C

OMPARISON

......................................................................... 2-10

T

ABLE 

2-3.   C

HIPSET 

F

UNCTIONS

.............................................................................................................. 2-16

T

ABLE 

2-4.   S

UPPORT 

C

OMPONENT 

F

UNCTIONS

........................................................................................ 2-17

T

ABLE 

2-5.   E

NVIRONMENTAL 

S

PECIFICATIONS

........................................................................................ 2-19

T

ABLE 

2-6.   E

LECTRICAL 

S

PECIFICATIONS

................................................................................................ 2-19

T

ABLE 

2-7.   P

HYSICAL 

S

PECIFICATIONS

.................................................................................................... 2-20

T

ABLE 

2-8.   M

ULTI

B

AY 

24

X 

CD-ROM D

RIVE 

S

PECIFICATIONS

............................................................... 2-20

T

ABLE 

2-9.   M

ULTI

B

AY 

24

X 

CD-ROM D

RIVE 

S

PECIFICATIONS

............................................................... 2-21

T

ABLE 

2-10.   H

ARD 

D

RIVE 

S

PECIFICATIONS

............................................................................................. 2-21

T

ABLE 

3–1.   C

ELERON 

P

ROCESSOR 

S

TATISTICAL 

C

OMPARISON

.................................................................. 3-2

T

ABLE 

3–2.   P

ENTIUM 

III P

ROCESSOR 

S

TATISTICAL 

C

OMPARISON

............................................................. 3-3

T

ABLE 

3–3. SPD A

DDRESS 

M

AP 

(SDRAM DIMM) .................................................................................... 3-6

T

ABLE 

3–4.  H

OST

/PCI B

RIDGE 

C

ONFIGURATION 

R

EGISTERS 

(GMCH, F

UNCTION 

0) ................................. 3-8

T

ABLE 

4-1.   PCI D

EVICE 

C

ONFIGURATION 

A

CCESS 

D

ATA

.......................................................................... 4-4

T

ABLE 

4-2.  LPC B

RIDGE 

C

ONFIGURATION 

R

EGISTERS 

(ICH, F

UNCTION 

0) ................................................ 4-6

T

ABLE 

4-3.   M

ASKABLE 

I

NTERRUPT 

P

RIORITIES AND 

A

SSIGNMENTS

.......................................................... 4-8

T

ABLE 

4-4.   M

ASKABLE 

I

NTERRUPT 

C

ONTROL 

R

EGISTERS

......................................................................... 4-8

T

ABLE 

4-5.   D

EFAULT 

DMA C

HANNEL 

A

SSIGNMENTS 

A

ND 

R

EGISTER 

I/O P

ORTS

................................... 4-10

T

ABLE 

4-6.   C

LOCK 

G

ENERATION AND 

D

ISTRIBUTION

.............................................................................. 4-11

T

ABLE 

4-7.   C

ONFIGURATION 

M

EMORY 

(CMOS) M

AP

............................................................................. 4-13

T

ABLE 

4-8.  

I

PAQ 2.0 S

YSTEM 

B

OOT

/ROM F

LASH 

S

TATUS 

LED I

NDICATIONS

........................................ 4-24

T

ABLE 

4-9.  S

YSTEM 

S

TATUS 

LED I

NDICATIONS

....................................................................................... 4-24

T

ABLE 

4-10.   S

YSTEM 

I/O M

AP

................................................................................................................ 4-26

T

ABLE 

4-11.  82801 ICH GPIO R

EGISTER 

U

TILIZATION

............................................................................ 4-27

T

ABLE 

4-12  I/O C

ONTROLLER 

C

ONTROL 

R

EGISTERS

................................................................................ 4-28

T

ABLE 

4-13.  LPC47B357 GPIO R

EGISTER 

U

TILIZATION 

(D

ESKTOP AND 

M

INITOWER ONLY

) .................. 4-29

T

ABLE 

4-14.  82802 FWH GPIO R

EGISTER 

U

TILIZATION

.......................................................................... 4-30

T

ABLE 

5–1.   IDE PCI C

ONFIGURATION 

R

EGISTERS

.................................................................................... 5-2

T

ABLE 

5–2.

   

IDE B

US 

M

ASTER 

C

ONTROL 

R

EGISTERS

................................................................................. 5-2

T

ABLE 

5–3.   40-P

IN 

P

RIMARY 

IDE C

ONNECTOR 

P

INOUT

............................................................................ 5-3

T

ABLE 

5–4.   68-P

IN 

M

ULTIBAY 

C

ONNECTOR 

P

INOUT

................................................................................. 5-4

T

ABLE 

5–5.

   

DB-9 S

ERIAL 

C

ONNECTOR 

P

INOUT

......................................................................................... 5-6

T

ABLE 

5–6.   S

ERIAL 

I

NTERFACE 

C

ONFIGURATION 

R

EGISTERS

.................................................................... 5-7

T

ABLE 

5–7.   S

ERIAL 

I

NTERFACE 

C

ONTROL 

R

EGISTERS

............................................................................... 5-8

T

ABLE 

5–8.   P

ARALLEL 

I

NTERFACE 

C

ONFIGURATION 

R

EGISTERS

............................................................. 5-10

T

ABLE 

5–9.

   

P

ARALLEL 

I

NTERFACE 

C

ONTROL 

R

EGISTERS

......................................................................... 5-11

T

ABLE 

5–10.   DB-25 P

ARALLEL 

C

ONNECTOR 

P

INOUT

.............................................................................. 5-14

T

ABLE 

5–11.   8042-T

O

-K

EYBOARD 

C

OMMANDS

...................................................................................... 5-16

T

ABLE 

5–12.   K

EYBOARD 

I

NTERFACE 

C

ONFIGURATION 

R

EGISTERS

.......................................................... 5-17

T

ABLE 

5–13.   CPU C

OMMANDS 

T

O 

T

HE 

8042.......................................................................................... 5-19

T

ABLE 

5–14.   K

EYBOARD

/P

OINTING 

D

EVICE 

C

ONNECTOR 

P

INOUT

.......................................................... 5-21

T

ABLE 

5–15.   USB I

NTERFACE 

C

ONFIGURATION 

R

EGISTERS

.................................................................... 5-24

T

ABLE 

5–16.   USB C

ONTROL 

R

EGISTERS

................................................................................................. 5-24

T

ABLE 

5–17.   USB C

ONNECTOR 

P

INOUT

.................................................................................................. 5-25

T

ABLE 

5–18.   USB C

ABLE 

L

ENGTH 

D

ATA

................................................................................................ 5-25

Summary of Contents for iPAQ 1.0

Page 1: ...Technical Reference Guide For the Compaq iPAQ Series of Desktop Personal Computers Covers iPAQ 1 0 1 2 and 2 0 Models...

Page 2: ...igned to be placed into a standard 3 ring binder Provided below is a title block that can be copied and cut out and placed into the slip or taped onto the edge of the binder iPAQ Series of Desktop Per...

Page 3: ...feel free to send any questions suggestions corrections or comments regarding this document please to the following email address CPCG Training compaq com When responding please state the title of th...

Page 4: ......

Page 5: ...m Compaq Computer Corporation 2000 Compaq Computer Corporation All rights reserved Compaq the Compaq logo are registered in the U S Patent and Trademark Office iPAQ is a trademark of Compaq Informatio...

Page 6: ...Technical Reference Guide Compaq iPAQ Series of Desktop Personal Computers Second Edition February 2001 ii...

Page 7: ...1 STANDARD FEATURES 2 2 2 2 2 OPTIONS 2 3 2 3 MECHANICAL DESIGN 2 4 2 3 1 CABINET LAYOUTS 2 4 2 3 2 CHASSIS LAYOUTS 2 6 2 3 3 SYSTEM BOARD LAYOUTS 2 8 2 4 SYSTEM ARCHITECTURE 2 10 2 4 1 IPAQ 1 0 1 2...

Page 8: ...NTROLLER FUNCTIONS 4 28 4 7 4 820802 FWH FUNCTIONS 4 30 CHAPTER 5 INPUT OUTPUT INTERFACES 5 1 INTRODUCTION 5 1 5 2 ENHANCED IDE INTERFACE 5 1 5 2 1 IDE PROGRAMMING 5 1 5 2 2 PRIMARY IDE INTERFACE 5 3...

Page 9: ...MMING 6 5 6 4 MONITOR POWER MANAGEMENT CONTROL 6 5 6 5 MONITOR CONNECTOR 6 6 6 6 UPGRADING GRAPHICS 6 6 CHAPTER 7 POWER SUPPLY AND DISTRIBUTION 7 1 INTRODUCTION 7 1 7 2 POWER SUPPLY ASSEMBLY CONTROL 7...

Page 10: ...AGES 6XX XX A 6 A 10 SERIAL INTERFACE ERROR MESSAGES 11XX XX A 6 A 11 MODEM COMMUNICATIONS ERROR MESSAGES 12XX XX A 7 A 12 SYSTEM STATUS ERROR MESSAGES 16XX XX A 8 A 13 HARD DRIVE ERROR MESSAGES 17XX...

Page 11: ...SYSTEM BOARD 5 3 FIGURE 5 2 68 PIN MULTIBAY CONNECTOR ON MULTIBAY BOARD 5 4 FIGURE 5 3 SERIAL INTERFACE CONNECTOR MALE DB 9 AS VIEWED FROM REAR OF CHASSIS 5 6 FIGURE 5 4 SERIAL INTERFACE HEADER IPAQ 1...

Page 12: ...C 3 U S ENGLISH 101 KEY KEYBOARD KEY POSITIONS C 5 FIGURE C 4 NATIONAL 102 KEY KEYBOARD KEY POSITIONS C 5 FIGURE C 5 U S ENGLISH WINDOWS 101W KEY KEYBOARD KEY POSITIONS C 6 FIGURE C 6 NATIONAL WINDOWS...

Page 13: ...4 10 TABLE 4 6 CLOCK GENERATION AND DISTRIBUTION 4 11 TABLE 4 7 CONFIGURATION MEMORY CMOS MAP 4 13 TABLE 4 8 IPAQ 2 0 SYSTEM BOOT ROM FLASH STATUS LED INDICATIONS 4 24 TABLE 4 9 SYSTEM STATUS LED IND...

Page 14: ...INT15 8 3 TABLE 8 2 CMOS FEATURE BITS 8 9 TABLE 8 3 PNP BIOS FUNCTIONS 8 12 TABLE 8 4 APM BIOS FUNCTIONS INT15 8 17 TABLE A 1 BEEP KEYBOARD LED CODES A 1 TABLE A 2 POWER ON SELF TEST POST MESSAGES A...

Page 15: ...guide can be used either as an online document or in hardcopy form 1 1 1 1 Online Viewing Online viewing allows for quick navigating and convenient searching through the document A color monitor will...

Page 16: ...uments Inc http www ti com USB user group http www usb org 1 3 MODEL NUMBERING CONVENTION The model numbering convention for Compaq iPAQ units is as follows 1 4 SERIAL NUMBER The unit s serial number...

Page 17: ...its 7 6 5 and 4 Example B IRQ3 7 9 IRQ signals 3 through 7 and IRQ signal 9 1 5 3 REGISTER NOTATION AND USAGE This guide uses standard Intel naming conventions in discussing the microprocessor s CPU i...

Page 18: ...PC architecture ATA AT attachment IDE protocol ATAPI AT attachment w packet interface extensions AVI audio video interleaved AVGA Advanced VGA AWG American Wire Gauge specification BAT Basic assurance...

Page 19: ...enhanced graphics adapter EIA Electronic Industry Association EISA extended ISA EPP enhanced parallel port EIDE enhanced IDE ESCD Extended System Configuration Data format EV Environmental Variable d...

Page 20: ...bit least significant byte LUN logical unit SCSI m Meter MCH Memory controller hub MMX multimedia extensions MPEG Motion Picture Experts Group ms millisecond MSb MSB most significant bit most signifi...

Page 21: ...mory RPM revolutions per minute RTC real time clock R W Read Write SCSI small computer system interface SDRAM Synchronous Dynamic RAM SEC Single Edge Connector SECAM sequential colour avec memoire seq...

Page 22: ...istor TIA Telecommunications Information Administration TPE twisted pair ethernet TPI track per inch TTL transistor transistor logic TV television TX transmit UART universal asynchronous receiver tran...

Page 23: ...access and mainstream performance Based on an Intel Celeron and Pentium III processors these systems are designed to maximize the effectiveness of internet and intranet usage while simplifying system...

Page 24: ...swap support Hard drive fault prediction Two USB ports on front panel Network interface controller VGA analog output 1600 x 1200 max resolution APM 1 2 power management support Plug n Play compatible...

Page 25: ...USB ports 3 1 3 1 3 1 4 4 Serial port 1 2 1 2 1 2 1 2 1 2 Parallel port 1 2 1 2 1 2 1 2 1 2 NOTES Legacy models ship with PS 2 keyboard and mouse Legacy free models ship with USB keyboard and mouse 1...

Page 26: ...rmation is primarily for identification purposes only For detailed information on servicing these systems refer to the applicable service guides Most components of iPAQ 1 0 1 2 and 2 0 systems are not...

Page 27: ...connector 8 Serial I F connector 9 USB port a direct b through hub 10 MultiBay device eject button 11 PS 2 mouse connector 12 PS 2 keyboard connector 13 AC line in connector 14 Line voltage select sw...

Page 28: ...cess panel The multibay device is located on the left side of the chassis and can be removed using the eject button without removing the left side cover Servicing the multibay board will however requi...

Page 29: ...eable components such as DIMMs and hard drives Item Description 1 Multibay storage device 2 Access hole to CMOS clear button 3 Access opening to DIMM sockets 4 Multibay device board PCA 011059 5 Hard...

Page 30: ...aker connector 15 PGA370 processor socket 5 Audio microphone headphone header 16 DIMM sockets 6 Audio line out jack 17 Processor boxed fan header 7 Audio line in jack 18 IDE pri 40 pin connector 8 Net...

Page 31: ...rs a J111 b J112 8 Network connector 9 Audio line in jack 10 Audio line out jack 11 Legacy module connector 12 PGA370 processor socket 13 DIMM sockets 14 Power supply connector 15 USB triple connector...

Page 32: ...l ports NOTE A legacy free iPAQ 1 0 1 2 system is upgradeable to become a legacy system only by changing the system board All iPAQ 1 x systems use the 810E chipset The 810E chipset includes the 82810E...

Page 33: ...Hub Link Bus LPC47B277 I O Controller Serial I F Parallel I F Keyboard Mouse I F LPC Bus Celeron or Pentium III Processor 82810E DC100 GMCH SDRAM System Memory PC100 Memory Bus 66 100 133 MHz FSB Mon...

Page 34: ...ide six USB ports Two USB ports are configured as direct ports with one direct port dedicated to a USB controller for maximum throughput operation Four ports are configured as through hub ports An LPC...

Page 35: ...C47B357 I O Controller Serial I F Parallel I F Keyboard Mouse I F LPC Bus Celeron or Pentium III Processor 82815 GMCH SDRAM System Memory PC133 Memory Bus 66 100 133 MHz FSB Monitor 4 MB Display Cache...

Page 36: ...of which operate at full processing CPU speed Celeron processors shipped with these systems provide the same level of MMX SSE support as Pentium III based systems The Celeron processor uses a Flip Chi...

Page 37: ...place by a retaining bar with it s own locking handle CAUTION Refer to section 3 2 2 Chapter 3 for a description of the removal and replacement of the processor assembly Factory configurations use pr...

Page 38: ...roller Hub GMCH 2D 3D graphics controller SDRAM controller supporting 2 PC100 DIMMs 66 100 133 MHz FSB PCI bus I F 82801AA I O Controller Hub ICH LPC bus I F SMBus I F IDE I F with UATA 66 support AC...

Page 39: ...ial IRQ converter Power button logic Slow speed detection S3 regulator controller GPIO ports 1 2 1 1 AD1881 or AD1885 Audio Codec Audio mixer Digital to analog converter Analog to digital converter An...

Page 40: ...Enhanced Parallel Port EPP1 9 and Enhanced Capability Port ECP compatible and supports bi directional data transfers through a DB 25 connector These interfaces may be disabled through Setup for enhanc...

Page 41: ...nthesis All specifications subject to change without notice Table 2 5 Environmental Specifications Table 2 5 Environmental Specifications Parameter Operating Nonoperating Air Temperature 50o to 95o F...

Page 42: ...tiBay 24x CD ROM Drive Specifications Table 2 8 MultiBay 24x CD ROM Drive Specifications SP 161685 B21 Parameter Measurement Interface Type Protocol IDE ATAPI Transfer Rate Max Sustained Burst 3 6 MB...

Page 43: ...m Full stroke 170 ms 280 ms 130 ms 225 ms Audio Output Level 0 7 Vrms Cache Buffer 512 KB Table 2 10 Hard Drive Specifications Table 2 10 Hard Drive Specifications Parameter 4 3 GB 6 0 GB 1 8 4 GB 10...

Page 44: ...Chapter 2 System Overview Compaq iPAQ Series of Desktop Personal Computers Second Edition February 2001 2 22 This page is intentionally blank...

Page 45: ...m III processor and the 810E or 815E chipset Figure 3 1 The chipset s GMCH supports up to two SDRAM DIMMs and integrates a 2D 3D graphics controller covered in Chapter 6 Figure 3 1 Processor Memory Su...

Page 46: ...s for accelerating multimedia communications applications Such applications often involve computing intensive loops that can take up as much as 90 percent of the CPU s execution time Using a parallel...

Page 47: ...6 KB 667 MHz 133 MHz Pentium III 700 700 MHz 256 KB 700 MHz 100 MHz Pentium III 733 733 MHz 256 KB 733 MHz 133 MHz 2 Pentium III 866 866 MHz 256 KB 866 MHz 133 MHz 3 NOTES 1 Standard processor on iPAQ...

Page 48: ...the new processor is a reversal of steps 1 8 CAUTION These systems are designed for using processors with passive heat sinks Installing a processor with an integrated fan on an iPAQ 1 x system is poss...

Page 49: ...2815 GMCH supports 16 64 128 and 256 Mb technology DIMMs for a maximum of 512 megabytes of memory space with two 256 MB DIMMs The RAM type and operating parameters are detected during POST by the syst...

Page 50: ...1 9 17 No of Banks For Each Mem Device 4 132 Header checksum 9 18 CAS Latencies Supported 4 133 145 Unit serial number 9 10 19 CS Latency 4 146 DIMM ID 9 11 20 Write Latency 4 147 Checksum 9 21 DIMM A...

Page 51: ...MB Host PCI Memory Expansion 1008 MB FFFF FFFFh 1 MB Graphics SMRAM RAM 128 KB System BIOS Area 64 KB Fixed Mem Area 128 KB Base Memory 512 KB Extended BIOS Area 64 KB Extended Memory 15 MB FFE0 0000...

Page 52: ...ce ID 1 6C 6Fh Memory Buffer Strength 55h 04 05h Command 0006h 70h Multi Transaction Timer 00h 06 07h Status 0210h 71h CPU Latency Timer 10h 08h Revision ID 72h SMRAM Control 02h 09 0Bh Class Code 90h...

Page 53: ...System resources 4 3 page 4 7 System clock distribution 4 4 page 4 11 Real time clock and configuration memory 4 5 page 4 11 System management 4 6 page 4 22 Register map and miscellaneous functions 4...

Page 54: ...ces A function is defined as the end source or target of the bus transaction A device may contain one or more functions In the standard configuration these systems use a hierarchy of three PCI buses F...

Page 55: ...incrementing mode In burst mode subsequent data phases are conducted a dword at a time with addressing assumed to increment accordingly four bytes at a time 4 2 1 2 Configuration Cycles Devices on th...

Page 56: ...iguration Access Data Table 4 1 PCI Component Configuration Access Data iPAQ 1 x iPAQ 2 0 1 PCI Component Device ID PCI Bus Device Function IDSEL Wired to 82810E 82815 GMCH Memory Controller PCI PCI A...

Page 57: ...well as the 82802 FWH The LPC bus transfers data a nibble 4 bits at a time at a 33 MHz rate Generally transparent in operation the LPC bus becomes a factor primarily during the configuration of DMA ch...

Page 58: ...er Reset Value 00 01h Vendor ID 8086h 8Ah Device 31 Error Status 00h 02 03h Device ID 2 90 91h PCI DMA Configuration 0000h 04 05h Command 000Fh A0 CFh Power Management 06 07h Status 0280h D0 D3h Gener...

Page 59: ...is a hardware generated signal used by peripheral functions within the system to get the attention of the microprocessor Peripheral functions produce a unique INTA H PCI or IRQ0 15 ISA signal that is...

Page 60: ...13 IRQ5 Unused 14 IRQ6 Diskette drive controller 15 IRQ7 Parallel port LPT1 IRQ2 NOT AVAILABLE Cascade from interrupt controller 2 APIC Mode The Advanced Programmable Interrupt Controller APIC mode en...

Page 61: ...5 Interval Timer 1 Counter 2 Speaker Status 4 Refresh Indicator toggles with every refresh 3 IOCHK NMI Enable Disable 0 NMI from IOCHK enabled 1 NMI from IOCHK disabled and cleared R W 2 System Board...

Page 62: ...s 0 1 2 3 Unused Audio subsystem Diskette drive Parallel port ECP or EPP mode Control registers 000h 00Eh Page register 087h Page register 083h Page register 081h Page register 082h Controller 2 word...

Page 63: ...rred to as CMOS functions are provided by the ICH component and is MC146818 compatible As shown in the following figure the ICH component provides 256 bytes of battery backed RAM divided into two 128...

Page 64: ...d refer to section 4 6 1 1 4 5 2 CMOS ARCHIVE AND RESTORE On iPAQ 1 0 1 2 systems the BIOS saves a copy of NVRAM CMOS contents password s and other system variables in a portion of the flash ROM durin...

Page 65: ...ved 28h Expanded base mem size IRQ12 12h Hard drive type 29h Miscellaneous configuration 13h Security functions 2Ah Hard drive timeout 14h Equipment installed 2Bh System inactivity timeout 15h Base me...

Page 66: ...ble 0 Normal operation 1 Disable time updating for time set 6 Periodic Interrupt Enable Disable 0 Disable 1 Enable interval specified by Register A 5 Alarm Interrupt Enable disable 0 Disabled 1 Enable...

Page 67: ...011 720 KB drive 0100 1 44 MB 1 25 MB drive 0110 2 88 MB drive all other values reserved Configuration Byte 12h Hard Drive Type Bit Function 7 4 Primary Controller 1 Hard Drive 1 Type 0000 none 1000 T...

Page 68: ...uration Byte 14h Equipment Installed Default Value standard configuration 03h Bit Function 7 6 No of Diskette Drives Installed 00 1 drive 10 3 drives 01 2 drives 11 4 drives 5 2 Reserved 1 Coprocessor...

Page 69: ...3 0 Reserved Values for bits 7 4 0 Disable 1 Enable for auto configure Configuration Byte 1Fh Power Management Functions Default Value 00h Bit Function 7 4 Reserved 3 Slow Processor Clock for Low Pow...

Page 70: ...cs Type 0 Color 1 Monochrome 2 Hard Drive Primary Secondary Address Select 0 Primary 1 Secondary 1 Diskette I O Port 0 Primary 1 Secondary 0 Diskette I O Port Enable 0 Primary 1 Secondary Configuratio...

Page 71: ...rive Timeout index to SIT timeout record Configuration Byte 2Bh System Inactivity Timeout Default Value 23h Bit Function 7 Reserved 6 5 Power Conservation Boot 00 Reserved 01 PC on 10 PC off 11 Reserv...

Page 72: ...hold the checksum of bytes 10h to 2Dh Configuration Byte 30h 31h Total Extended Memory Tested This location holds the amount of system memory that checked good during the POST Configuration Byte 32h...

Page 73: ...Disconnected 1 Connected 1 Real Mode Connection 0 Disconnected 1 Connected 0 Power Management Enable 0 Disabled 1 Enabled Configuration Byte 36h ECC POST Test Single Bit Errors Default Value 01h Bit F...

Page 74: ...ly as a network application through Compaq Customer Support Setup Password The Setup utility may be configured to be always changeable or changeable only by entering a password The password is held on...

Page 75: ...ion consult the appropriate user reference guide for this system 4 6 1 2 Cable Lock Provision These systems include a chassis cutout on the rear panel for the attachment of a cable lock mechanism 4 6...

Page 76: ...Off On Off Invalid ROM detected flash failed Blinking 4 Blinking 4 Blinking 4 Keyboard locked in network mode Blinking 5 Blinking 5 Blinking 5 Successful boot block ROM flash On 6 On 6 On 6 NOTES 1 A...

Page 77: ...eat sink The iPAQ 1 0 1 2 system includes a system board connector for a processor fan which if present operates in tandem with the power supply fan The iPAQ 2 0 system does not provide a connector fo...

Page 78: ...troller 00C0 00DFh DMA Controller 2 00F0h Coprocessor error register 0170 0177h IDE Controller 2 active only if standard I O space is enabled for primary drive 01F0 01F7h IDE Controller 1 active only...

Page 79: ...of the ICH s LPC I F Bridge 82801 function 0 The GPIO ports are controlled through 64 bytes of I O space that is mapped during POST Table 4 11 lists the utilization of the ICH s GPIO ports Table 4 11...

Page 80: ...I O Controller Control Registers Table 4 12 I O Controller Control Registers Index Function Reset Value 02h Configuration Control 00h 03h Reserved 07h Logical Device Interface Select 00h Diskette Driv...

Page 81: ...ion Direction GPIO Function Direction 10 Board rev 1 I 42 PME to ICH2 O 11 Board rev 0 I 43 NC 12 Multibay power I 44 Hood Lock NC 13 PME I 45 Hood Unlock NC 14 WOL NC 46 SMI to ICH2 O 15 System ID 4...

Page 82: ...a cold boot is required to gain access to the disabling Device Disable register Processor present speed detection One of the battery back general purpose inputs GPI26 of the LPC47B357 detects if the...

Page 83: ...the 82801 component of the chipset The primary IDE controller supports the hard drive while the secondary controller supports a device installed in the Multibay Each controller can be configured inde...

Page 84: ...h 4A 4Bh Sync DMA Timing 0000h 0Dh Master Latency Timer 0000h 54h EIDE I O Config Register 00h 0Eh Header Type 80h F8 FBh Manufacturer s ID 0F 1Fh Reserved 00h FC FFh Reserved 20 23h BMIDE Base Addres...

Page 85: ...DD9 Data Bit 9 26 GND Ground 7 DD5 Data Bit 5 27 IORDY I O Channel Ready 3 8 DD10 Data Bit 10 28 CSEL Cable Select 9 DD4 Data Bit 4 29 DAK DMA Acknowledge 10 DD11 Data Bit 11 30 GND Ground 11 DD3 Data...

Page 86: ...Data Bit 12 13 DD2 Drive Data Bit 2 14 DD13 Drive Data Bit 13 15 DD1 Drive Data Bit 1 16 DD14 Drive Data Bit 14 17 DD0 Drive Data Bit 0 18 DD15 Drive Data Bit 15 19 GND Ground 20 key No connection 21...

Page 87: ...The Compaq iPAQ does not support a diskette drive However the I O controller component contains a diskette drive controller that may need to be enabled though Setup to satisfy the requirements of som...

Page 88: ...lly set to match the capability of the connected device While most baud rates may be set at runtime baud rates 230400 and 460800 must be set during the configuration phase 5 4 1 RS 232 INTERFACE On th...

Page 89: ...dress range COM1 COM2 etc and also must be activated before it can be used Address selection and activation of the serial interface are affected through the PnP configuration registers of the LPC47B27...

Page 90: ...8 bytes 11 14 bytes 5 3 Rerserved 2 TX FIFO reset active high 1 RX FIFO reset active high 0 FIFO Enable Disable 0 Disable TX RX FIFO s 1 Enable TX RX FIFO s R W 3FBh 2FBh Line Control Register 7 Regis...

Page 91: ...active the system either waits for a status change or generates an error message 2 The system sends a byte of data to the Printer Data register then pulses the printer STROBE signal through the Printe...

Page 92: ...e Extended Control register Two submodes of ECP allow the parallel port to be controlled by software In these modes the FIFO is cleared and not used and DMA and RLE are inhibited 5 5 4 PARALLEL INTERF...

Page 93: ...1 2 3 LPT1 2 LPT1 2 3 Base 2h Control LPT1 2 3 LPT1 2 LPT1 2 3 Base 3h Address LPT1 2 Base 4h Data Port 0 LPT1 2 Base 5h Data Port 1 LPT1 2 Base 6h Data Port 2 LPT1 2 Base 7h Data Port 3 LPT1 2 Base 4...

Page 94: ...Drivers enabled Port writes to peripheral default 1 Backward Tristates drivers and data is read from peripheral 4 Acknowledge Interrupt Enable 0 Disable ACK interrupt 1 Enable interrupt on rising edg...

Page 95: ...nly This register defines the ECP mode functions Bit Function 7 5 ECP Submode Select 000 Standard forward mode 37Ah 5 forced to 0 Writes are controlled by software and FIFO is reset 001 PS 2 mode Read...

Page 96: ...Strobe Write 1 14 LF Line Feed 2 2 D0 Data 0 15 ERR Error 3 3 D1 Data 1 16 INIT Initialize Paper 4 4 D2 Data 2 17 SLCTIN Select In Address Strobe 1 5 D3 Data 3 18 GND Ground 6 D4 Data 4 19 GND Ground...

Page 97: ...commands originated by either the keyboard or the 8042 and scan codes from the keyboard A command can request an action or indicate status The keyboard interface uses IRQ1 to get the attention of the...

Page 98: ...de 3 Read ID F2h Instructs the keyboard to stop scanning and return two keyboard ID bytes Set Typematic Rate Display F3h Instructs the keyboard to change typematic rate and delay to specified values B...

Page 99: ...T and control which occurs during runtime 5 6 3 1 8042 Configuration The keyboard pointing device interface must be enabled and configured for a particular speed before it can be used Enabling and spe...

Page 100: ...d the pointing device This register is also used to send the second byte of multi byte commands to the 8042 and to receive responses from the 8042 for commands that require a response A read of 60h by...

Page 101: ...installed Tests whether or not a password is installed in the 8042 If FAh is returned password is installed If F1h is returned no password is installed A5h Load password This multi byte operation plac...

Page 102: ...e bits 3 0 of the input port into the lower half of the status byte on a continous basis until another command is received D0h Read output port This command directs the 8042 to transfer the contents o...

Page 103: ...h physically and electrically Figure 5 7 and Table 5 14 show the connector and pinout of the keyboard pointing device interface connectors Figure 5 7 Keyboard or Pointing Device Interface Connector as...

Page 104: ...rily As shown in Figure 5 8 USB interfacing is provided by the 82801 ICH or ICH2 component and a TPS2054 or TUS2046B hub component Figure 5 8 USB I F Block Diagram Legacy free iPAQ 1 0 1 2 and all iPA...

Page 105: ...t with every packet to identify the attributes in out start of frame SOF setup data acknowledge stall preamble and the degree of error correction to be applied Address and Endpint Fields 7 and 4 bit f...

Page 106: ...er Reset Value 00 01h Vender ID 8086h 0Dh Latency Timer 00h 02 03h Device ID 1 0Eh Header Type 00h 04 05h PCI Command 0000h 20 23h I O Space Base Address 1h 06 07h PCI Status 0280h 3Ch Interrupt Line...

Page 107: ...feet for full channel 12 MB s operation depending on cable specification see following table Table 5 18 USB Cable Length Data Table 5 18 USB Cable Length Data Conductor Size Resistance Maximum Length...

Page 108: ...the Audio Controller and the Audio Codec over the AC97 Link Bus Playback audio from the Audio Codec is routed to a low distortion mono amplifier that drives a long excursion large magnet speaker for...

Page 109: ...atures an 8 watt speaker amplifier versus the 5 watt amplifier of the iPAQ 1 x PB Audio L R AD1881 Audio Codec L R Line In PC Beep Audio CD Audio L CD ROM In Multibay AC97 Link Bus 82801AA ICH PCI Bus...

Page 110: ...rames synchronized by the 48 KHz SYNC signal which is derived from the clock signal and driven by the audio controller The SYNC signal is high during the frame s tag phase then falls during T17and rem...

Page 111: ...d playback of stereo left and right audio The Sample Rate Generator may be set for sampling frequencies up to 48 KHz Analog audio may then be routed through 3D stereo enhancement processor or bypassed...

Page 112: ...terrupt Pin 03h 0Eh Header Type 00h 3E FFh Reserved 0 s 10 13h Nat Audio Mixer Base Addr 1h NOTE 1 2415h 82801AA ICH 2445h 82801BA ICH2 5 8 5 2 Audio Control The audio subsystem is controlled through...

Page 113: ...KHz to 48 KHz Resolution 16 bit 1 Hz Nominal Input Voltage Mic In w 20 db gain Line In 283 Vp p 2 83 Vp p Impedance Mic In Line In Line Out 1 K ohms nom 10 K ohms min 800 ohms Signal to Noise Ratio Li...

Page 114: ...s link detection in 100 MB s mode always on if 100Base Tx is forced Figure 5 14 Network Interface Controller Block Diagram The Intel 825xx Ethernet Controller includes the following features Intel 825...

Page 115: ...tain events over a network even while the system unit is powered off In a system off powered down condition the 82801 ICH and the 825xx NIC components receive auxiliary 3 3 VDC power derived from the...

Page 116: ...allowing a plugged in unit to be turned on remotely over the network i e remote wake up In APM mode the controller will respond upon receiving a Magic Packet which is a packet where the node s addres...

Page 117: ...n ROM Base Addr 0Ch Cache Line Size 01h 34h Capabilities Pointer DCh 0Dh Latency Timer 04h 3C 3D Interrupt Line Pin 0Eh Header Type 00h 3E 3Fh Min Gnt Max Lat 0Fh BIST 00h DC E3h Power Mgmt Functions...

Page 118: ...Parameter Modes Supported 10BASE T half duplex 10 MB s 10Base T full duplex 20 MB s 100BASE TX half duplex 100 MB s 100Base TX full duplex 200 MB s Standards Compliance IEEE VLAN 802 1A IEEE 802 2 IE...

Page 119: ...cts Functional description 6 2 page 6 2 Programming 6 3 page 6 5 Monitor power management 6 4 page 6 5 Monitor connector 6 5 page 6 6 Upgrading graphics 6 6 page 6 6 6 1 1 FEATURE SUMMARY The graphics...

Page 120: ...g Figure 6 1 Graphics Subsystem Block diagram The graphics controller uses a portion of system memory for instructions textures and frame display buffering Using a process called Dynamic Video Memory...

Page 121: ...increasing 3D performance substantially The integrated graphics controller uses a specific amount of system memory This memory is allocated as follows Video BIOS 512 or 1024 kilobytes An OS report of...

Page 122: ...0 x 576 24 16 7M 60 75 85 800 x 600 8 256 60 70 72 75 85 800 x 600 16 65K 60 70 72 75 85 800 x 600 24 16 7M 60 70 72 75 85 1024 x 768 8 256 60 70 72 75 85 1024 x 768 16 65K 60 70 72 75 85 1024 x 768 2...

Page 123: ...AQ 2 0 82815 1132h The graphics controller is controlled through memory mapped registers by the appropriate software driver 6 4 MONITOR POWER MANAGEMENT CONTROL The controller provides monitor power c...

Page 124: ...Red Analog 9 PWR 5 VDC fused 1 2 G Blue Analog 10 GND Ground 3 B Green Analog 11 NC Not Connected 4 NC Not Connected 12 SDA DDC2 B Data 5 GND Ground 13 HSync Horizontal Sync 6 R GND Red Analog Ground...

Page 125: ...er include Power supply assembly control 7 2 page 7 1 Power distribution 7 3 page 7 5 Signal distribution 7 4 page 7 7 7 2 POWER SUPPLY ASSEMBLY CONTROL This system features a power supply assembly th...

Page 126: ...Minimum loading requirements must be met at all times to ensure normal operation and specification compliance 2 Surge duration no longer than 10 seconds and 12 tolerance 10 Table 7 2 iPAQ 2 0 90 Watt...

Page 127: ...then initializes ACPI four second counter is not active On ACPI Disabled Negative pulse of which the falling edge causes power control logic to de assert the PS On signal ACPI four second counter is...

Page 128: ...embly that routes 3 3 VDC 5 VDC 5 VDC 12 VC and 12 VDC to the system board as well as to the individual drive assemblies Figure 7 2 shows the power supply cabling Conn Pin 1 Pin 2 Pin 3 Pin 4 Pin 5 Pi...

Page 129: ...ell as to the individual drive assemblies Figure 7 3 shows the power supply cabling Conn Pin 1 Pin 2 Pin 3 Pin 4 Pin 5 Pin 6 Pin 7 P1 3 3 5 RTN 5 RTN 5 RTN P1 1 3 3 12 FO PS On 5 Aux RTN 12 P3 12 GND...

Page 130: ...circuitry on the system board An on board regulator produces the VccP processor core voltage according to the strapping of signals VID3 0 by the processor The possible voltages available are listed a...

Page 131: ...connector On legacy free models USB connector Figure 7 4 iPAQ 1 0 1 2 Signal Distribution Diagram System Board PCA 161014 or 161015 3 5 5 12 VDC IDE I F IDE Hard Drive 5 12 VDC Conn J8B1 Pri IDE J7E1...

Page 132: ...011010 3 5 5 12 VDC IDE I F IDE Hard Drive 5 12 VDC Conn P1 Pri IDE P20 Sec IDE P21 IDE I F 5 VDC Audio Multibay Storage Device Keyboard Mouse Legacy Module Conn J90 Power Supply Assembly Legacy Modul...

Page 133: ...to Send 9 Ring Indicate 7 Request to Send Serial Port A COM1 Header J1G2 Legacy free iPAQ 1 x only Gnd 5 Audio Header J2D1 iPAQ 1 x Mic Audio 1 HP Audio L 7 Line Audio L 9 Mic Bias 3 2 Gnd 8 Line Audi...

Page 134: ...Chapter 7 Power and Signal Distribution Compaq iPAQ Series of Desktop Personal Computers Second Edition February 2001 7 10 This page is intentionally blank...

Page 135: ...ion and configuration 8 3 page 8 11 PnP support 8 5 page 8 12 Power management functions 8 6 page 8 15 USB legacy support 8 7 page 8 17 BIOS upgrading 8 8 page 8 18 NOTE This chapter describes BIOS in...

Page 136: ...y purposes This feature selectable through the Setup utility Fail safe bootblock recovery Recovery from a corrupted BIOS ROM is handled differently in the iPAQ 2 0 units De asserted A20 address line l...

Page 137: ...m Memory Map Real E822h Flash ROM Sys Admin Fnc Real 16 32 bit Prot E827h DIMM EEPROM Access Real 16 32 bit Prot E828h Inhibit power button Real 16 32 bit Prot E845h Access CMOS Feature Bits Real 16 3...

Page 138: ...oint as well as the immediately following physical page It must have the same base CS is execute read DS Data selector set to encompass the physical page holding entry point as well as the immediately...

Page 139: ...ion Output Successful If BH 0 DS SI Buffer with EDID file CX Number of bytes written CF 0 AH 00h Completion of command If BH 1 BH System DDC support 0 1 DDC1 support 1 1 DDC2 support BL Monitor DDC su...

Page 140: ...set Size Description 00h QWORD base address 08h QWORD length in bytes 10h DWORD type of address range 01h memory available to OS 02h reserved not available e g system ROM memory mapped device other no...

Page 141: ...o disable the power button preventing a user from inadvertently powering down the system This tri modal function is typically used in the ROM flashing procedure to reduce the chance of an accidental p...

Page 142: ...00h AL Byte value on a read Failure CF 1 AH 86h Function not supported FFh byte does not exist 8 3 8 ACCESSING CMOS FEATURE BITS The BIOS function INT 15 AX E845h is a tri modal call for accessing are...

Page 143: ...035h Copy Std CMOS 1 1 0011h Admin Password 1 1 0036h AGP Adapter Srch 01h Yes 0012h Pwr On Password 1 1 0037h APM Fan Throttle 00h Auto 0013h Ownership Tag 1 1 0038h Mfg Diags Enable 00h No 0014h War...

Page 144: ...rite protect function that determines diskette write control is extended to cover all drives that use removable read write media i e if diskette write protect is invoked then any diskette drive power...

Page 145: ...d or returned value of other than 02h EDO or 04h SDRAM results in the slot marked as empty If mixed types are detected then only SDRAMs are used see chapter 3 for details b SPD byte 18 is read for max...

Page 146: ...guration 1 50h Get SMBIOS Structure Information 51h Get Specific SMBIOS Structure NOTE 1 Since no ISA slots are present this function will return 0 for the max CSN The BIOS call INT 15 AX E841h BH 01h...

Page 147: ...he number of structures size of the largest structure and SMBIOS version Function 51h retrieves a specific structure This system the following structure types Type Data 0 BIOS Information 1 System Inf...

Page 148: ...eld in RAM but memory image from lower state has been saved to disk for recall upon wake up Low Low Low No No Yes G2 S5 Soft Off OS has completed shutdown Some devices may be powered to allow for wake...

Page 149: ...UPPORT Advanced Power Management APM BIOS support provides interaction between the BIOS ROM and the operating system OS The BIOS advises the OS when a power state transition should occur The OS then n...

Page 150: ...system to On a Keyboard PS 2 only b Mouse PS 2 only c Serial port d Hard drive e RTC Alarm f Power Button If no APM connection is present the BIOS will set an APM timer to 45 minutes at which time th...

Page 151: ...ce Power Management 530Eh APM Driver Version 530Fh Engage Disengage Power Management 5380h OEM Compaq Specific APM Function 8 7 USB LEGACY SUPPORT The BIOS ROM checks the USB port during POST for the...

Page 152: ...r 7 At the Flash Memory Write menu to the question Do you want to save BIOS select Y If you want to save the current BIOS then type the current BIOS name and the extension after File name to save exam...

Page 153: ...A 2 BEEP KEYBOARD LED CODES Table A 1 Beep Keyboard LED Codes Table A 1 Beep Keyboard LED Codes Beeps LED 1 Probable Cause 1 short 2 long NUM lock blinking Base memory failure 1 long 2 short CAP lock...

Page 154: ...ilure or stuck key 304 Keyboard System Unit Error Keyboard controller failed self test 404 Parallel Port Address Conflict Current parallel port address is conflicting with another device 510 Slpash Im...

Page 155: ...tem error 105 06 Port 61 bit 5 not at one 112 08 Unable to enter Auto mode in speed test 105 07 Port 61 bit 3 not at one 112 09 Unable to enter High mode in speed test 105 08 Port 61 bit 1 not at one...

Page 156: ...attern test 210 03 Error while restoring memory during increment pattern test 211 01 Memory random pattern test 211 02 Error while saving memory during random memory pattern test 211 03 Error while re...

Page 157: ...st failed 402 07 Loopback tst data cntrl reg failed 403 xx Printer pattern test failed 402 08 Interrupt test failed 404 xx Parallel port address conflict 402 09 Interrupt test and data reg failed 498...

Page 158: ...603 xx Diskette drive R W compare test 612 xx Sec diskette drive port addr conflict 604 xx Diskette drive random seek test 694 00 Pin 34 not cut on 360 KB drive 605 xx Diskette drive ID media 697 00...

Page 159: ...OM checksum failure 1205 07 Dial number string too long 1201 17 Tone detect failure 1205 08 Modem time out waiting for remote response 1202 XX Modem internal test 1205 09 Modem exceeded maximum redial...

Page 160: ...recalibrate drive 17xx 66 Failed to initialize drive parameter 17xx 43 Failed to format a bad track 17xx 67 Failed to write long 17xx 44 Failed controller diagnostics 17xx 68 Failed to read long 17xx...

Page 161: ...led 1901 xx Tape servo write failed 1905 xx Tape read test failed 1902 xx Tape format failed 1906 xx Tape R W compare test failed 1903 xx Tape drive sensor test failed 1907 xx Tape write protect faile...

Page 162: ...eek test failed See Table A 18 for additional messages A 18 NETWORK INTERFACE ERROR MESSAGES 60xx xx Table A 17 Network Interface Error Messages Table A 17 Network Interface Error Messages Message Pro...

Page 163: ...pe write protected 6nyy 54 BSY stayed busy 6nyy 18 No data detected 6nyy 60 Controller CONFIG 1 register fault 6nyy 21 Drive command aborted 6nyy 61 Controller CONFIG 2 register fault 6nyy 24 Media ha...

Page 164: ...Appendix A Error Messages and Codes Compaq Personal Computers Changed November 2000 A 12 This page is intentionally blank...

Page 165: ...x Symbol Dec Hex Symbol Dec Hex Symbol 0 00 Blank 32 20 Space 64 40 96 60 1 01 33 21 65 41 A 97 61 a 2 02 34 22 66 42 B 98 62 b 3 03 35 23 67 43 C 99 63 c 4 04 36 24 68 44 D 100 64 d 5 05 37 25 69 45...

Page 166: ...3 99 185 B9 217 D9 249 F9 154 9A 186 BA 218 DA 250 FA 155 9B 187 BB 219 DB 251 FB 156 9C 188 BC 220 DC 252 FC 157 9D 189 BD 221 DD 253 FD 158 9E 190 BE 222 DE 254 FE 159 9F 191 BF 223 DF 255 FF Blank...

Page 167: ...s appendix covers the following keyboard types Standard enhanced keyboard Space Saver Windows version keyboard featuring additional keys for specific support of the Windows operating system Easy Acces...

Page 168: ...after a period of 150 ms to 2 seconds The keyboard undergoes a Basic Assurance Test BAT that checks for shorted keys and basic operation of the keyboard processor The BAT takes from 300 to 500 ms to c...

Page 169: ...verify the state of the signal If a low is detected the keyboard will finish the current transmission if the rising edge of the clock pulse for the parity bit has not occurred The system uses the same...

Page 170: ...additional NRZI encoding and formatting prior to leaving the keyboard to comply with the USB I F specification discussed in chapter 5 of this guide Packets received at the system s USB I F and decode...

Page 171: ...2 Key Keyboard Key Positions 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 31 39 32 33 34 35 36 37 38 40 41 42 43 44 45 46 47 48 30 49 50 51 59 60 61 62 63 64 65 66 67...

Page 172: ...6 37 38 40 41 42 43 44 45 46 47 48 30 49 50 51 59 60 61 62 63 64 65 66 67 68 69 70 71 75 76 77 78 79 80 81 82 83 84 85 86 92 93 94 95 96 52 53 54 55 56 57 72 73 74 88 89 90 100 58 91 87 97 98 99 101 1...

Page 173: ...ut shown in Figure C 7 and is available with either a legacy PS 2 type connection or a Universal Serial Bus USB type connection NOTE Main key positions same as Windows Enhanced Figures C 5 or C 6 Figu...

Page 174: ...aps Lock key Num Lock The Num Lock key pos 32 when pressed and released invokes a BIOS routine that turns on the num lock LED and shifts into upper case key positions 55 57 72 74 88 90 100 and 101 Whe...

Page 175: ...lts in software interrupt 15h AX 8500h being executed It is up to the application to use or not use this BIOS function The Ctrl and Alt keys can be used together in conjunction with keys in positions...

Page 176: ...mmunity Emoney 3 Extra web site Compaq web site 4 Go to favorite web site AltaVista web site 5 Internet search Search 6 Instant answer Travel expenses 7 E commerce Shopping 8 Button Easy Access Keyboa...

Page 177: ...ode the keyboard is operating in Mode 1 In Mode 1 operation the keyboard generates scan codes compatible with 8088 8086 based systems To enter Mode 1 the scan code translation function of the keyboard...

Page 178: ...21 4 05 85 25 F0 25 25 F0 25 22 5 06 86 2E F0 2E 2E F0 2E 23 6 07 87 36 F0 36 36 F0 36 24 7 08 88 3D F0 3D 3D F0 3D 25 8 09 89 3E F0 3E 3E F0 3E 26 9 0A 8A 46 F0 46 46 F0 46 27 0 0B 8B 45 F0 45 45 F0...

Page 179: ...51 E0 D1 E0 AA E0 51 E0 D1 E0 2A 4 E0 a E0 51 E0 D1 E0 AA 6 E0 7A E0 F0 7A E0 F0 12 E0 7A E0 F0 7A E0 12 5 E0 12 E0 7A E0 F0 7A E0 F0 12 6 6D F0 6D 55 7 47 C7 6 6C F0 6C 6 6C na 6 56 8 48 C8 6 75 F0...

Page 180: ...6B E0 F0 12 E0 6B E0 F0 6B E0 12 5 E0 12 E0 6B E0 F0 6B E0 F0 12 6 61 F0 61 98 E0 50 E0 D0 E0 AA E0 50 E0 D0 E0 2A 4 E0 2A E0 50 E0 D0 E0 AA 6 E0 72 E0 F0 72 E0 F0 12 E0 72 E0 F0 72 E0 12 5 E0 12 E0 7...

Page 181: ...9 E0 1A E0 9A E0 54 E0 F0 54 99 F0 99 Btn 4 9 E0 1E E0 9E E0 1C E0 F0 1C 95 F0 95 Btn 5 9 E0 13 E0 93 E0 2D E0 F0 2D 0C F0 0C Btn 6 9 E0 14 E0 94 E0 2C E0 F0 2C 9D F0 9D Btn 7 9 E0 15 E0 95 E0 35 E0 F...

Page 182: ...oard Systems that do not provide a PS 2 interface will ship with a USB keyboard For a detailed description of the PS 2 and USB interfaces refer to chapter 5 Input Output of this guide The keyboard cab...

Page 183: ...5 4 Network RJ 45 5 36 parallel interface 5 14 serial interface RS 232 5 6 5 7 Universal Serial Bus interface 5 25 cooling 4 25 core voltage 3 2 3 3 Desktop Management 8 3 device ID PCI 4 4 DIMM 3 5 D...

Page 184: ...12 Plug n Play BIOS function 8 12 power button 7 3 Power Button Override 4 12 power distribution 7 4 Power indicator 4 30 power management ACPI 4 23 network interface controller NIC 5 34 power manage...

Page 185: ...USB interface 5 22 USB keyboard C 4 USB legacy support 8 17 USB ports 2 18 vender ID PCI 4 4 voltage core 3 2 3 3 wake up events 7 3 wake up remote 5 34 Windows keys C 9 WOL 7 3 ZIF socket 2 14...

Page 186: ...This page is intentionally blank...

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