GRMON3-UM
June 2019, Version 3.1.0
7
www.cobham.com/gaisler
2. Debugging concept
2.1. Overview
The GRMON debug monitor is intended to debug system-on-chip (SOC) designs based on the LEON processor.
The monitor connects to a dedicated debug interface on the target hardware, through which it can perform read
and write cycles on the on-chip bus (AHB). The debug interface can be of various types: the LEON3/4 processor
supports debugging over a serial UART, 32-bit PCI, JTAG, Ethernet and SpaceWire (using the GRESB Ethernet
to SpaceWire bridge) debug interfaces. On the target system, all debug interfaces are realized as AHB masters
with the Debug protocol implemented in hardware. There is thus no software support necessary to debug a LEON
system, and a target system does in fact not even need to have a processor present.
Figure 2.1. GRMON concept overview
GRMON can operate in two modes: command-line mode and GDB mode. In command-line mode, GRMON
commands are entered manually through a terminal window. In GDB mode, GRMON acts as a GDB gateway and
translates the GDB extended-remote protocol to debug commands on the target system.
GRMON is implemented using three functional layers: command layer, debug driver layer, and debug interface
layer. The command layer takes input from the user and parses it in a Tcl Shell. It is also possible to start a GDB
server service, which has its own shell, that takes input from GDB. Each shell has it own set of commands and
variables. Many commands depends on drivers and will fail if the core is note present in the target system. More
information about Tcl integration can be found in the Section 3.5, “Tcl integration”.
The debug driver layer implements drivers that probes and initializes the cores. GRMON will scan the target system
at start-up and detect which IP cores are present. The drivers may also provides information to the commands.
The debug interface layer implements the debug link protocol for each supported debug interface. Which interface
to use for a debug session is specified through command line options during the start of GRMON. Only interfaces
based on JTAG supports 8-/16-bit accesses, all other interfaces access subwords using read-modify-write. 32-bit
accesses are supported by all interfaces. More information can be found in Chapter 5, Debug link.
2.2. Target initialization
When GRMON first connects to the target system, it scans the system to detect which IP cores are present. This is
done by reading the plug and play information which is normally located at address 0xfffff000 on the AHB bus. A
