Chroma 66203, User Manual

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Status Reporting
6-3
6.2.1 Channel Status
■
The Channel Status register informs you one or more channel status conditions, which
indicate certain errors or faults have occurred to a specific channel. Table 6-1 explains
the channel status conditions that are applied to the electronic load.
■
When the bits of the Channel Status Condition register are set, the corresponding
condition is true.
■
Program the PTR/NTR filter to select the way of condition transition in the Channel
Status Condition register that will be set in the Event registers.
■
Reading the Channel Status Event register resets itself to zero.
■
The Channel Status Enable register can be programmed to specify the channel status
event bit that is logically ORed to become the corresponding channel bit in Channel
Summary Event register.
Table 6-1 Bit Description of Channel Status
Mnemonic Bit Value Meaning
OVR 0 1
Over voltage range
. When over voltage range condition has
occurred on a channel, Bit 0 is set and remains set until the
over voltage range condition is removed and :PROT:CLE is
programmed.
OCR 1 2
Over current range
. When an over current range condition has
occurred on a channel, Bit 1 is set and remains set until the
over current range condition is removed and :PROT:CLE is
programmed.
OCP 2 4
Over current protection
. When an over current condition has
occurred on a channel, Bit 2 is set and remains set until the
over current condition is removed and :PROT:CLE is
programmed.
Integrate
RCE
3 8
Integration range changed error.
It happens when the
measured voltage or current signal is over the measurement
range at performing integration measurement function.
Inrush
RCE
4 16
Inrush range changed error.
It happens when the measured
voltage or current signal is over the measurement range at
performing Inrush measurement function.
Energy
RCE
5 32
Energy range changed error.
It happens when the measured
voltage or current signal is over the measurement range at
performing Energy measurement function.
6.2.2 Channel Summary
■
The Channel Summary registers summarize the channel status conditions up to 10
channels.
■
When an enabled bit in the Channel Status Event register is set, it causes the
corresponding channel bit in the Channel Summary Event register to be set.
■
Reading the Event register will reset it to zero.
■
The Channel Summary Enable register can be programmed to specify the channel
summary event bit from the existing channels that is logically ORed to become Bit 2
(CSUM bit) in the Status Byte register.