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CPU L1 & L2 Cache
Cache memory is much faster than conventional DRAM system memory.
These fields allow you to
enable
or
disable
the CPUs Level 1 built-in
cache and Level 2 external cache. Both settings are left as Enabled to
significantly enhance the performance of your computer.
Hyper-Threading Technology
When you install a CPU featuring Hyper-Threading Technology, this item
will allow you to
enable
or
disable
the Hyper-Threading technology.
Options: Disabled
、
Enabled (default).
Quick Power On Self Test
Enable
this function to reduce the amount of time required to run the
POST (Power On Self Test). BIOS will save time by skipping certain
tests during POST. It is recommended that you
disable
this setting.
Finding a problem during boot up is better than loosing data during your
work.
Boot Up NumLock Status
This function defines the keyboard's numberpad as number keys or arrow
keys. If it is set at
On
the number keys will be activated, if it is set at
Off
the arrow keys will be activated.
Typematic Rate Setting
When
enabled
, you can set the following two-typematic control items.
When
disabled
, the keyboard controller determines keystrokes arbitrarily
in your system.
Typematic Rate (Chars/Sec)
The typematic rate sets the rate at which characters on the screen repeat
when a key is pressed and held down.
Typematic Delay (Msec)
The typematic delay sets how long after you press a key that a character
begins repeating.
APIC Mode
By enabling this option, “
MPS version control for OS
” can be
configured.
Disabled
is recommended.
MPS Version Control for OS
The 1.1 version is the older version that supports 8 more IRQs in the
Summary of Contents for V915P
Page 1: ...CHAINTECH V915P Intel 915P ICH6 ATX Motherboard Reference Manual...
Page 6: ......
Page 51: ...45 Main Menu PHOENIX AWARD BIOS CMOS Enter Advanced BIOS PnP PCI BIOS Integrated Peripherals...
Page 53: ...47 Enter Y Enter BIOS CMOS CMOS Exit Save Exit Setup Enter Y Enter CMOS BIOS...
Page 54: ...48 BIOS Phoenix Award BIOS Delete BIOS BIOS PHOENIX AWARDTM CMOS...
Page 56: ...50 Security Base Memory Extended Memory Total Memory...
Page 77: ...71 Power ACPI Suspend Mode ACPI 1 S1 POS S1 CPU 2 S3 STR S3 Wake up 3 S1 S3 S3 S3...
Page 84: ...78 Exit Save Exit Setup Y CMOS Exit Without Saving...