Casio CTK-680, Service Manual

Page: 9 / 25

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Block diagram of DSP and DAC circuit
Pin No. Terminal I n / O u t Function
106 EOEB Out Read enable signal output for the effect RAM
108 VCC7 In +5 V source
111 ECEB Out Chip select signal output for the effect RAM
113 ~ 117 ED11 ~ ED15 — Not used
118 VCC4 In +5 V source
119 GND4 In Ground (0 V) source
120 ~ 122 ED8 ~ ED10 — Not used
123 ~ 130 ED0 ~ ED7 In/Out Data bus for the effect RAM
131 GND6 In Ground (0 V) source
132 ~ 134 — — Not used. Connected to ground.
135, 136 — — Not used
DSP
LSI11
HG51B155FD-1
Effect RAM (256K-bit)
LSI13
LC33832M-70-TLM
Sound Source ROM
LSI12
MX23C2410MC-12CA54
CE
A0 ~ A20 Q0 ~ Q15
RA0 ~
RA20
RD0 ~
RD15
RA22
D0 ~ D7
A0 ~ A3
SOLP
BOK
WOK1
EA0 ~
EA14
ED0 ~
ED7
CS
WE
OE
I/01 ~ I/08 A0 ~ A14
ECEB EOEB EWEB
PG
X11
24.576 MHz
DAC
IC11
UPD6376GS
LOUT
ROUT
SOLP: Sound data
BOK: Bit clock
WOK1: Word clock
SI
CLK
LRCK
CCSB
LSIB
RDAB
WRAB
RESET
CRDB
CWRB
RESB
Gate Array
LSI17
UPD65611GB
From CPU