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Notes

• This CMU diagram is drawn in terms of normal CMOS positive logic levels, in contrast 

to the negative levels of the 161.  As such, there is an implicit logical inversion in the 
connection between the calculator and the CMU.

CalcSig => nCmuSig

• Connector point NTL is unused on the calculator.  It may be connected to –10V to 

supply the CMU, alternatively a clip-lead from the CMU may be used to connect to 
–10V.

• LED limiting resistors should be chosen appropriately for LEDs used.

• Alternatives to stop clock after keypress is registered:.

• CP => U4.10, U4.14 => U4.7.  Stop after 8 clock cycles.
• OS => U4.10, U4.11 => U4.7.  Stop on assertion of OS.

• Improvement: Add a  Clock-Enabled LED driven by U6b.6.

• Bug: T-8 is derived from a ripple counter, glitches may stop the clock in the middle of 

the digit, requiring two presses per digit.

Other Servicing Notes

• A & B Counters may be monitored with LEDs with 2K resistors connected between 

the collector of the nQ transistors and –10V.

• The D Counter may be monitored by connecting 35B4 output (at 4.7K R near edge of 

board 35) to –10V.

Revision Log

• 2001 Jan:

Version 1, original design and construction / bh.

• 2010 Nov:

Version 2, Digit and Interval controls added / bh.

• 2021 Dec:

Version 3, allow control over clocking when nFM / bh.

The  Controller/Monitor  Unit  (CMU)

The 161 has an internal test connector which provides access to the master clock and most of the flag 

registers.  Presumably there was originally a service unit to plug into this connector.  The CMU is a newly-
designed unit utilizing CMOS ICs.  It provides monitors for the available flags along with manual control of the 
master clock.

The 161 uses a direct-drive display (not multiplexed) and static memory technology, consequently the clock 

can be slowed down or stopped without disrupting the display or state of the machine.  The control aspect of the 
CMU functions by inhibiting the normal delivery of clock pulses in the 161.  Installing the CMU and flipping the 
test-mode switch to the up position inserts a pulse transfer gate between the master clock of the 161 and the 
rest of the calculator.  The functioning of this gate is controlled by the keys of the CMU and the keys of the 
calculator:

Calculator Keys:

The pressing of a calculator key enables clock pulses.  This enables FK to 
clock and pick up the keypress from OS.ST.  Clocking is disabled when OS is 
asserted.

 
Normal Calculator Mode (C): Enables normal delivery of clock pulses.

Repeat Mode (R):

Repeatedly allows one clock pulse through the gate at a rate determined by 
the “Repeat Rate” control.

Stop / Clock Step (S):

Takes the CMU out of normal or repeat mode (stops continuous delivery of 
clock pulses) and allows one clock pulse through the gate per press. 

Digit Step (D):

Enables clock pulse delivery till the end of the next digit cycle.  Typically this 
will be 4 clock pulses, and will step the calculator thru one digit cycle.

Number Step (N):

Enables clock pulse delivery till the next end of a number cycle.

The pulse transfer gate is fully synchronised to the pulses from the master clock, permitting the mode to be 

changed at any time, between or during, execution of operations.

Using the CMU

1. Begin with the 161 turned off.
2. Plug the CMU edge connector into the test connector of the 161.
3. If NTL has not been connected to –10V, connect the CMU power lead to the blue (-10V) power supply 

connector.

4. Connect the KOR lead to N302B.
5. Flip the test-mode toggle switch of the 161 to the up position.
6. Turn the 161 on.
7. Press the “N” key of the CMU.  The 161 should function normally.

When operating in other than normal mode, a key pressed on the 161 may need to be held down until the 

operation is complete.  This is necessary for some operations because the calculator logic utilises the state of the 
keyboard during execution.  The keyboard state is not fully latched at the beginning of an operation.  Once the 
state machine makes it to CC2 and beyond, the key may be released, an exception being the Total key must be 
held down through CC7.

The Probe leads can be used to monitor other signals in the 161.  The probes may not be valid for (and 

probably should not be connected to) the output of OR gates due to the +10 bias on such outputs, as this may 
pull a CMOS input below Vss of the IC.

Canon 161 Calculator

Section: CMU Operation

 Page: CMU.2

Rendition: 2022 Feb 6

Summary of Contents for 161

Page 1: ...Digit Counter DC 15 Arithmetic ACC Register 16 IR Register 17 ME Register Zero Gates 18 Power Supply 19 Timing Diagram 20 Connectors Nbb1p Nbb2p 21 Connectors Nbb3p Nbb4p 22 Board Layout 30 33 23 Board Layout 34 37 24 Board Layout 38 40 25 Controller Monitor Unit CMU CMU 1 CMU Operation CMU 2 Canon 161 Calculator Section Title Contents Page 1 Rendition 2022 Feb 6 This schematic has been derived th...

Page 2: ... contains the second operand Arithmetic is incorporated in this register ACC Bit stream output ACC15D 0 ACC16D 0 ME Register ME User memory controlled by the A switch and T key ME Bit stream output ME15D 0 ME16D 0 P Counter PC Point Counter Holds the position of the displayed decimal point PC 0 D Counter DC Digit Mark Counter Holds the position of the multiply digit marker DC 0 A Counter AC Counte...

Page 3: ...Machine CC0 CC7 Timing Numeral Encoder K0 K9 W1 W2 W4 W8 KN Overflow Lamp logic supplies display supply V L Power Supply 6543210987654321 16 1 of 10 Decoder Drivers FG Flag FH Flag F Flag FCO Flag FCU Flag 1 of 16 Decoder Drivers 1 of 16 Decoder Drivers A Counter 4 bits AC 0 B Counter 4 bits BC 0 ACC16D 0 ACC15D 0 PC 0 DC 0 K F CC to all sections ME16D 0 ME15D 0 MSD 0 IR16D 0 IR15D 0 IR Register I...

Page 4: ...2 n2 4 n4 8 n8 2V d 0 B77 Nbbcp d 1 B77 Nbbcp d 2 B77 Nbbcp d 3 B77 Nbbcp d 4 B77 Nbbcp d 5 B77 Nbbcp d 6 B77 Nbbcp d 7 B77 Nbbcp d 8 B77 Nbbcp d 9 V L n1 8 1 8 d digit 16 to 1 bb board 30 31 32 33 34 c connector 3 4 p pin A to Z bbAdd0 2 bbAdd1 2 bbAdd2 2 bbAdd3 2 bbAdd4 2 bbAdd5 2 bbAdd6 2 bbAdd7 2 bbAdd8 2 bbAdd9 2 1 n1 2 n2 4 n4 8 n8 Display n8 Display 8 n4 4 n2 2 n1 1 t V a r i a t i o n s 0 ...

Page 5: ...D FS J K IR1 8 D S FX J K CJK 470pF CFF 1nF T A538 IR1 4 JK S F J K IR1 2 JK S FO J K IR1 1 JK S FM J K I R J K FG J K ME Register ME Register FH J K ME16 8 D CD 470pF CFF 1nF RFF 12K RL 3K FP J K M E J K CJK 470pF CFF 1nF RFF 12K RL 3K FZ J K Shift Pulse Generators Shift Pulse Generators Shift Pulse Generators FCO J K CJK 470pF CFF 1nF T A538 SP A MEMC FCU J K SP M MEMC FC1 JK TETC RTE 22K SP I M...

Page 6: ... SC N381P TD1 N372B n2 n4 n8 n16 n1 N381R TD15 N302D 2 4 8 n16 n1 N381V TD16 N352S 2 4 8 n16 1 FD2 Q T nQ S SC FD1 Q nQ S SC 2 n2 4 n4 8 n8 n16 1 n1 CP FB1 Q T nQ FB2 Q T nQ T 1 N302P 1 n1 2 n2 1 n2 T 4 N302R 1 2 T 8 N302S n1 n2 P 8 N302H 2 N343C N372C N361T N382V NTX N364X N381W N402B N341T N351U N381A N391K N372A N381C N361M N402L N402M CP FL D Q C N382U N331R FL nQ nFL TD0 N342J N372D nTE TC T ...

Page 7: ...2A N362Z K N P N311Z N342U N322S N332X N322T FK D Q C nQ OS nS Q SC nR nQ P 8 N302J N352W FK RC N391X N343S N341L N362Y N343T N331N N362X N342A N362R N372P N382S N401T N362W N322N N352F N381S N342X N342W N371U N322P N343R N352M N381K N391W N362V K C B N322R N343B N362S N401E N372W N342D N332W N371V N402H KA N322U N341Y nK X T BC CP K N P FO N302M N342B OS N351Z N361P N382X N391Z N401R NTW N331L N3...

Page 8: ...n1 n2 4 1 2 4 n1 4 CC2 CC5 NTP N321Z N321U N343Y FC1 J Q C nQ CP TC nTE nFL K n FX F CC4 nFM nF nFM AC 0 CC2 KT nF OS CC0 F KT FL T 4 CC0 F CC2 DC 0 F nFG TD15 CC4 CINT3 CINT4 nFM CC5 AC 0 KC 1 n1 FC2 J Q C nQ CP TC nTE K 2 n2 FC4 J Q C nQ CP TC nTE K 4 n4 FZ FX FZ CC0 F KT KC FG CC1 nF KR CC1 KC FX nFM DC 0 CC3 KC IFC1 KC F KT FL T 4 CC7 FX TD16 T 8 CC4 IFC2 to FM Flag FC4 KCI KCM N312S FS F nKR ...

Page 9: ... C nQ K CP N392W FS nFS N312W N343U N371L N343V N371K N401Z NTK N392X EP CC7 F FM nFZ CC4 nFM CC3 CA F J Q C nQ K EP CP OS KS N364U F J Q C nQ K EP CP N401Y F nF N312V N321W N331M N361Z N372N N371Y N382K N392J N401L nFX n FX F nF N342E N381Z N402R N302C N321N FH nFM nAM16D 0 T 4 nF CC2 nFH F nACC15D 0 T 4 nFM CC5 FH F nME1516D 0 T 4 nFM CC5 nFM FG nIR16D 0 CC1 nFH nFM nIR16D 0 T 4 CC2 N382L N362A ...

Page 10: ...age 10 Rendition 2022 Feb 6 N362N K E S F OS CC1 FH FO T 4 CC5 K CC1 OS FL FX KT OS AC 0 F nDC 0 T 8 FM CC2 nFM PC 0 nAC 0 CC3 EP N351E N364J CINT6 N364B N351D nFM CC1 AC 0 OS K 40A3 40A4 40A5 40A6 40A7 40A8 36A23 36A24 36A25 36A26 36A27 36A28 35A5 36A29 36A30 34A3 34A4 34A5 39A9 39A10 34O3 36O11 36O10 40O1 39O3 FZ J Q C nQ K CP N402W N322W N364Y N402T nFZ N321V N392K FZ FX CC4 DC 0 KA F nFA CC3 F...

Page 11: ...N382H nFM N343X N352P TD16 FM enable clocking of registers counters FO CC2 5 AC 0 nFO TD15 CC1 TD1 KB TD15 CC2 5 TD0 T 8 FG CC1 FC4 SFM N361L N371S N391L N352J N362T N392P N401W NTA CINT3 CINT4 FC2 K X R CM B C KN N381L N391V 38A4 38A5 38A6 38A7 38A8 38A9 38A10 38O2 38O1 6 KCI KT K N311W K P E S T CI N302F KP N392A K E S KC KCM KB KR KX N311X N391Y 31O2 1 31O4 2 CC0 OS OS OS FL 39A11 39A12 39A13 3...

Page 12: ...FABDP 36A15 36A16 36A17 36O6 36O7 FB J Q C nQ K CP RFB SFB CC2 5 input to gate 34A6 labeled on board as CC5 OR Diode for connection between 36A34 36O20 is labeled and installed as AND DA red rather than DO green FM CC5 FP KR nBC 0 OS CC0 AC 0 CC7 FX KP N364L N341P N364A N341R F CC2 36O16 FD J Q C nQ K CP CC7 AC 0 nAC 0 CC7 TD0 K N P T F OS CC0 FX CC3 FX CC1 SFBD 36A49 36A50 36A51 36A52 36A53 36O19...

Page 13: ...b TC b N401S NTE AC1 J Q C nQ R RC K CP AC2 Q nQ R RC P 8 N392Y AC 0 N351C N392Z nAC 0 N361X FM nTE a TC a nTE b TC b CP CP AC4 Q nQ R RC nTE a TC a nTE b TC b CP AC8 Q nQ R RC nTE a TC a nTE b TC b N352N N361U EP EP EP EP FA CC2 5 nFP REV NOR N382F NTD K N P T CC0 F KR CC1 OS N341K N364F FG CC1 FZ F CC1 BRN BCRVS N341D N364H 39A14 39A15 36A37 36A38 36A45 36A46 34A7 34A8 34A10 39A16 36O14 36O17 RE...

Page 14: ...329 N353S B329 N353N B329 N353K 2V DP1 DP4 DP7 DP10 DP13 1 n2 n4 n8 n1 n2 4 n8 1 2 4 n8 n1 2 n4 8 1 n2 4 8 THOU1 B329 N353Z DP0 N352X nPC 0 N361V KB CC0 FM KC FP F KR OS N351V N364S F CC1 FG CP CP CP 2 n2 4 n4 8 n8 35A6 35A7 35A25 2 35A26 2 36O18 35O2 V L V L 2V 2V 35A9 2 35A10 2 35A11 2 35A12 2 35A13 2 n1 2 n4 n8 1 n2 4 n8 n1 n2 n4 8 1 2 n4 8 n1 2 4 8 35A14 2 35A15 2 35A16 2 35A17 2 35A18 2 1 2 n...

Page 15: ...12 MK15 DC1 J C R RC K CP P 8 FM CC4 FX rD RDF N351R DC 0 N342H N381U N361S n4 n2 1 n8 N351S DC 1 N402P 4 2 1 8 N351T DC 15 N402N 33 10 2V B329 N354Z MK0 n1 n2 n4 n8 CC1 THOU3 THOU2 nDC 0 N351P N402E KR CC1 OS EP N364P N352E Q nQ 1 n1 DC2 Q T nQ R RC DC4 Q T nQ R RC DC8 Q T nQ R RC CP CP CP 2 n2 4 n4 8 n8 35A28 35A29 35A35 1 35A36 1 35A37 1 35A38 1 35A39 1 35A40 1 35A41 1 35A42 1 35A43 1 35A44 1 3...

Page 16: ...FZ CC3 K N P CC0 CC7 nFX nF KA CC6 CC1 CC6 CC7 nK CI CM CC0 FO CC2 5 CA N371D N392N N343W K nFP nFH FCO T 9 CC2 5 N371M N343K nS1 S1 SP A D Q C nQ J Q C K nQ N401A N372L N391A N401B D Q C nQ J Q C K nQ N371A N391B J Q C K nQ J Q C nQ SP A SP A SP A SP A SP A ACC ACC5 8 ACC1 1 ACC11 8 ACC6 1 ACC12 1 ACC15 8 K 18 more flip flops 22 more flip flops 14 more flip flops S2 nACC15 1 37A2 37A3 37A4 37A5 3...

Page 17: ... I IR16 8 D Q C nQ SP I IR16 1 D Q C nQ SP I D Q C nQ SP I IR16 4 IR16 2 nIR16 2 IR16 4 IR16 2 DC 0 FX nMSD 0 T 8 CC3 G J IR16 2 nIR16 2 N342N MSD 1 FO CC1 ME nF KR ACC F FG ACC CC4 ME CC7 G I N371R N342S FG F FO K N P CC7 KCI KR CC0 CC2 5 CC4 CC6 G II N371P N342R K C B 33K 33K 33K 14 more flip flops 14 more flip flops 34A12 37A45 37A46 37A47 37A48 37A49 32A11 4 34A13 34A14 30A10 37A50 37A51 37A52...

Page 18: ...IR16 2 nIR15 4 nIR15 8 nIR15 2 nIR16 1 nIR15 1 N341C nIR15D 0 N401P N342L nIR16D 0 N352U nIR16 8 N342K nMSD 0 N402A nIR16 2 nIR16 4 nIR16 8 N343L nAM16D 0 N361D nIR N361E CC6 ACC nKT CC7 ACC nKT FO CC6 CC2 5 CC7 K C B CM G M N372X N332E 9ME nFP nFH FCU T 9 CC2 5 N343J Canon 161 Calculator Section ME Register Zero Gates Page 18 Rendition 2022 Feb 6 14 more flip flops 33K 33K 14 more flip flops 14 m...

Page 19: ...F N312H N322H N332H N401J N391J N381J N371J N361J N351J N341J N331J N321J N311J N301J N312K N322K N332K NS9 NS10 N352Z N342Z N332Z N322Z N312Z N302Z 2V 2V 2V 2V 2V Canon 161 Calculator Section Power Supply Page 19 Rendition 2022 Feb 6 E 10V 10V 2V N302V 100 15V FAN DC 1 6A 12V 12 6V DC 2 5A to display lamps 390 30 15V 30 15V 30 15V 2 of 30 15V 100 15V 30 15V 100 15V 30 15V 100 15V to keyboard V L ...

Page 20: ...ly appear on an oscilloscope with more positive voltage vertically higher on the trace In contrast for logic levels logic 1 is the lower level of a trace and logic 0 the higher level One cycle of FM during an operation is shown here SP x TDx and FL are only active during FM During some states these signals may vary from those shown here As measured CP cycle time is 105 µS 9 6 KHz with 0 pulse of 1...

Page 21: ...KR B KOR B nFM A nMSD 0 A K P CI A FX A T 8 A F A FO A KR A A A KCI A K N P A N401 N401 N391 N391 N381 N381 N371 N371 N361 N361 N351 N351 N341 N341 N331 N331 N321 N321 N311 N311 N301 N301 nFS Z OS Z n FX F Z CC4 Z nF Z OS Z CC1 Z SP A Z CC5 Z nKX Z KN Z F Y K X C Y CC4 Y F Y OS FL Y CC4 Y nK X T Y CP Y nFP Y KOR Y KP Y nME1516D 0 nME1516D 0 X KS X nFG X FG X nAC 0 X FX X nFP X FM X CC2 X K X C X K...

Page 22: ...D IND16 6 D IND12 6 D IND8 6 D IND4 6 D IND2 6 D C DC15 C IND16 7 C IND12 7 C IND8 7 C IND4 7 C IND2 7 C SFH B B IND16 8 B IND12 8 B IND8 8 B IND4 8 B IND2 8 B RFB A A IND16 9 A IND12 9 A IND8 9 A IND4 9 A IND2 9 A N353 N353 N343 N343 N333 N333 N323 N323 N313 N313 PC0 Z CP Z IND13 0 Z IND9 0 Z IND5 0 Z PC1 Y CC4 Y IND13 1 Y IND9 1 Y IND5 1 Y PC2 X nFM X IND13 2 X IND9 2 X IND5 2 X PC3 W C A W IND1...

Page 23: ... 8 ME13 4 ME13 2 ME13 1 IR11 1 IR11 2 IR11 4 IR11 8 IR12 1 IR12 2 IR12 4 IR12 8 IR13 1 IR13 2 IR13 4 IR13 8 IR14 1 IR14 2 IR14 4 IR14 8 OS FL EP 33V2 33V1 3 0 3 9 4 0 4 9 5 0 5 9 6 0 6 9 ME7 1 nKX nK X R CM ME7 2 ME7 4 ME7 8 ME8 1 ME8 2 ME8 4 ME8 8 ME6 8 ME6 4 ME6 2 ME6 1 ME5 8 ME5 4 ME5 2 ME5 1 IR3 1 IR3 2 IR3 4 IR3 8 IR4 1 IR4 2 IR4 4 IR4 8 IR5 1 IR5 2 IR5 4 IR5 8 IR6 1 IR6 2 IR6 4 IR6 8 nKR nKT...

Page 24: ...Z N351A N351Z N352A N352Z N364A N364Z RFABDP SFBD RFAP SFABP SFAP N353A N353Z 0 15 0 15 DC 8 DC 4 DC 2 DC 1 FD N354A N354Z PC 0 nPC 0 DC 0 nDC 0 DC 15 DC 1 35B8 PC 8 PC 4 PC 2 PC 1 FP FO 35B1 35B6 35V8 35B5 35V7 35B7 35V9 35B4 35V6 35V5 FH OF DRV MARK DRIVERS DP DRIVERS N343A N343Z N344A N344Z 15 0 15 9 16 0 16 9 IR15 1 IR15 2 IR15 4 IR15 8 IR16 1 IR16 2 IR16 4 IR16 8 BC 8 BC 4 BC 2 BC 1 BC 0 nBC ...

Page 25: ...5 1 40B2 40B3 ACC1 1 ACC3 4 ACC2 1 ACC3 1 ACC4 1 N401A N401Z N402A N402Z ACC5 8 F FG FZ 40B1 FC4 FC2 FC1 CC7 CC1 CC2 CC5 CC6 CC4 CC3 CC2 5 FD8 FD4 FD2 FD1 FL FM 38B3 TD16 TD15 38B2 38B5 nFM 38B4 SFM 38B7 38B8 38B6 ACC8 2 ACC10 1 ACC6 1 ACC8 4 ACC7 1 ACC8 1 ACC9 1 ACC10 8 ACC11 1 ACC11 8 FCU FA 39V1 NOR 39V2 REV 39V3 nAC 0 39V4 AC 0 AC8 AC4 AC2 AC1 FS F ...

Page 26: ...U1b U7a U7b U7c U7d U2a U2b U8b AC 0 nAC 0 BC 0 nBC 0 3 1 21 13 24 2N3904 2N3906 25 470 LED Driver SIG 2N3906 CC1 CC2 CC3 CC4 CC5 CC6 CC7 FA FG FH FP FS FZ AC 0 BC 0 LED Driver LED Driver LED Driver LED Driver LED Driver LED Driver LED Driver LED Driver LED Driver LED Driver LED Driver LED Driver LED Driver LED Driver LED Driver 14 15 16 17 18 19 20 6 10 11 5 12 9 7 8 U6b 5 4 3 6 3 1 2 U8a 10n Sto...

Page 27: ... the rest of the calculator The functioning of this gate is controlled by the keys of the CMU and the keys of the calculator Calculator Keys The pressing of a calculator key enables clock pulses This enables FK to clock and pick up the keypress from OS ST Clocking is disabled when OS is asserted Normal Calculator Mode C Enables normal delivery of clock pulses Repeat Mode R Repeatedly allows one cl...

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