Cameron KS21TK305A, Service Manual

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SERVICE MANUAL
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demodulator has to be set to one of the fixed frequencies (43.008 MHz or 49.152 MHz) by the IFA
-IFE bits in subaddress 31H. The I.F. centre frequency depends on the I.F. downmix frequency and
the FM demodulator settings. The bandwidth of the RIF filter should be between 200 and 300 KHz
for proper channel selectivity. A common QSS sound SAW filter with 800 KHz bandwidth is too
wide. In the FM radio eco mode the SSIF output signal can be supplied to the output pins (FMRO)
for external filtering by setting the IFO2- IFO0 bits in subaddress 31H.
The SS IF bit can be either pin 33 or pin 53 (pins 96 or 76 respectively for the
“
face down
”
version). The selection is made by means of the CMB2-CMB0, SSIFS and SSIFM bits.
1.8.6 CVBS and Y/C input signal selection
The ICs have 3 inputs for external CVBS signals. All CVBS inputs can be used as Y input for
the insertion of Y/C signals. However, the CVBS(Y)2 input has to be combined with the C3 input. It
is possible to add and extra CVBS(Y/C) input via the pins which are intended to be used for YUV
interface (or RGB/YPBPR input). The selection of this additional CVBS(Y/C) input is made via the
YC bit. The CVBS selector has one independently switchable output. The switch configuration is
given in Figure 72. The choice of the various modes can be made via the INA-IND bits in
subaddress 38H.
The function of the IFVO/SVO/CVBS6 pin is determined by the SVO1/SVO0 bits. When used
as output a selection can be made between the IF video output signal or the selected CVBS signal
(monitor out). This pin can also be used as additional CVBS input. In the input selector this signal is
indicated as CVBS/Y-6 (see Figure 72). The CVBS/Y-6 input has to be combined with the C4 input.
The selection of the CVBS/Y-6 signal is valid only at the SVO1/SVO0 setting 1/0.
It is possible to use the group delay and sound trap circuit for the CVBS2 signal (via the CV2
bit).
For the CVBS(Y/C) inputs the circuit can detect whether a CVBS or Y/C signal is present on
the input. The result can be read from the status register (YCD bit in subaddress 03H) and this
information can be used to put the input switch in the right position (by means of the INA-IND bits
in subaddress 38H). The Y/C detector is only active for the CVBS(Y)3/C3, CVBS(Y)4/C4 and
CVBS(Y)x/Cx inputs. It is not active for the CVBS(Y)2/C3 and CVBS(Y)6/C4 inputs.
The video ident circuit can be connected to all video input signals. This ident circuit is
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