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User's Manual (MUT)
Mod. V812 16 Channel Constant Fraction Discriminator
20/04/2009
4
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00101/97:V812x.MUTx/04 V812_REV4.DOC
23
16
3.2. Discriminator
thresholds
(Base a %00 to %1E write only)
These registers contain the discriminator threshold values on 8 bit words. The threshold values
can be programmed in a range from -1 mV to -255 mV with 1 mV steps, writing an integer
number between 1 and 255 into the register, although a minimum threshold of -5 mV is
required; the channel thresholds are individually settable.
3.3. Pattern of Inhibit
(Base a %4A write only)
This register contains the Pattern of Inhibit, a 16 bit word indicating which channels are either
enabled or disabled (bit X=1
⇒
Ch. X enabled…bit X=0
⇒
Ch. X disabled).
3.4. Output width Ch. 0 to 7 and Ch. 8 to 15
(Base a %40 write only; Base a %42 write only)
These registers contain the output pulse width value of the channels 0 through 7 and channels
8 through 15 respectively, on a 8 bit words. Thes values can be adjusted in the range from 15
ns to 250 ns, writing an integer number between 0 and 255 into the registers. The set value
corresponds to the width as follows: 255 leads to a 250 ns pulse duration, 0 leads to a 15 ns
pulse duration, with a non-linear relation for intermediate values. The following figure shows the
Pulse width (ns) vs. Register set value (count)
Output Width
0,00
20,00
40,00
60,00
80,00
100,00
120,00
140,00
160,00
180,00
200,00
220,00
240,00
260,00
0
20
40
60
80 100 120 140 160 180 200 220 240
count
ns
Fig. 3.1: Output width vs. Register set value
count ns
0 11.32
15 12.34
30 13.47
45 14.75
60 16.07
75 17.51
90 19.03
105 21.29
120 23.69
135 26.71
150 30.61
165 35.20
180 41.83
195 51.02
210 64.53
225 87.47
240 130.70
255 240.70
