Quark Up R1270 - R1270CEVB - Technical Information Manual
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External Connections
GPIO connector pi nout (J5) i s s hown i n the fol l owi ng ta bl e:
Pin #
Signal
1
GPIO 1
2
GPIO 0
3
GPIO 2
4
GPIO 3
5
GND
6
GND
Tab. 3.2: Quark Up R1270CEVB GPIO connector pinout
J4 (not popul a ted) i s the JTAG connector for i nterna l debug purpos es a nd s ha l l not be us ed.
In ca s e an OEM ma nufacturer wants to connect the modul e to i ts own devi ce for tes ti ng purpos es , SMT pa ds a re
pres ent on the bottom s i de of the boa rd for power s uppl y, UART a nd USB s i gna l s .
Pad #
Signal
P1
RXD
P2
TXD
P3
D+
P4
D-
P5
Vi n (2.5Vdc ÷ 4.5Vdc)
P6
GND
Tab. 3.3: Quark Up R1270CEVB SMT pads signals
Fig. 3.3: Quark Up R1270CEVB SMT pads