Product Application Note
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BCM5221
7/7/00
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BCM5220
Bro a d c o m Co rp o r a t i o n
5221/5220-AN01 Product Application Note, Revision R
Page 4
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Edge rates: from 1 ns to 4 ns (10% to 90%)
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Voltage swing: limited to OVDD maximum
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Crystal Aging: +/- 5 ppm per year, maximum
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Crystal Frequency Stability (over temperature): +/- 10 ppm
The following clock devices exhibit good performance in a variety of Broadcom’s evaluation platforms.
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Oscillator: GED part number LM20001E/DI-25.000M (GED, San Marcos, CA, (760) 591-4170)
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Crystal: Epson part number MA-506-25.000M-C2 (http://www.epson-electronics.de/download/downcrys.htm)
Digi-Key part number SE2639CT-ND
RDAC
The 100Base-TX and 10Base-T transmit amplitudes can be directly controlled by adjusting the amount of current allowed to
flow from the RDAC pin to GND. It is recommended that in order to verify proper transmit signal amplitude for a given design,
an initial value of 1.27K
Ω
(1%) be used for the external RDAC resistor (See Figure 8 on page 15 and Figure 9 on page 16).
It is important to note that the transmit signal amplitude can be affected by magnetics insertion loss as well as stray capac-
itance in the front-end design. Therefore, it is important to quantify these additional possible sources of attenuation and ad-
just the value of the RDAC resistor accordingly to compensate.
A 1% change in RDAC current results in a 1% change in transmit amplitude at the TD+/- outputs. Increasing the value of the
RDAC resistor results in a proportional decrease in transmit amplitude, and vice - versa.
L
OW
P
OWER
M
ODES
The BCM5221 supports two low power modes of operation as discussed in the data sheet: Manual Low Power Mode, and
Automatic Power Down Mode.
Manual Low Power mode (LOW_PWR pin = 1) configures the device such that all circuitry, with the exception of the Energy
Detect block, is powered down. This mode results in maximum device current consumption of approximately 10mA. This
Energy Detect circuit asserts the ENERGY_DET output when receive energy is detected at the RD+/- wire side inputs. Spe-
cifically, if energy of at least 300 mV pk-pk differential is present for at least 1.3 ms, the ENERGY_DET pin asserts.
REF_CLK must be present for the Energy Detection mode to function properly.
In order to remove the PHY from the Energy Detect Low Power mode, the LOWPWR pin must be set to a logic zero. you do
not need to generate a hardware reset. REF_CLK must be active and stable.
Automatic Power Down Mode is enabled by setting bit 5 of the Shadow Register 1Ah. When this mode is enabled, the
BCM5221 remains inactive and will not transmit anything onto the wire until it detects energy (at least 300mV differential) at
it’s RD+/- inputs. Once energy is detected, the BCM5221 will automatically power up operate normally. Note that the use of
this feature should be restricted to implementations and environments where the Link partner is a known entity. For example,
if both ends of the link happen to be in Automatic Power Down mode, the link will never activate.
It is important to note that in order to successfully enter either of the Low Power modes, REF_CLK must continue for a least
two full clock cycles after LOWPWR is switched. This is to ensure that low power mode is properly latched in. REF_CLK can
then be deactivated, if needed.
D
UAL
F
UNCTION
P
INS
The BCM5221 includes several dual purpose pins that combine input and output functions. The input function for these pins
is latched into the device at power-on / reset. These pins assume the output function during normal device operation.