Blacet Research Time Event Modulator EG3870 User & Assembly Manual Download Page 3

Page 3

Operation Notes

The  EG3870  uses the  inverted envelope as  the default cv  source for  modulation. Since this  is occurring at  the same  rate as 
the regular envelope, the effect will  be to bias each ADSR segment from the standard RC curve to  one that is more linear or 
even  bent  the  opposite  direction.  The  following  show  the  attack  segment  with  no  modulation  in  the  center.  FCCW 
modulation on the left and FCW on the right.

Using the Global CV Input, for example with the velocity, aftertouch or modulation wheel of a keyboard via the 
MIDIverter, allows flexible expression possibilities. Plugging into the separate ADSR CV Inputs will allow even more 
complex  modulation. 

Any external modulation source can be used here; find your favorites.

Delay function:

The range of 0-10 seconds is spaced non-linearily around the dial with the rotation center equal to 1 S. 
The Delay IC will respond to the 

second

 gate after power up, so give your keyboard an extra tap after turning it on.

The time delay is resettable, meaning that the interval will start over every time the gate is activated as long as the 
delay has not elapsed.
There are two responses of the Delay, depending on if the gate is held active momentarily or throughout the delay 
period. In the first case, the delay will proceed automatically, then trigger the AD cycle, ending at the Sustain 
Level.This will be held until the next Gate is applied and held as in case 2. Setting the Sustain level at 0 will give an 
AD style envelope. In the second case, the envelope will proceed normally through the ADS cycle, releasing when 
the gate goes low.

End of Attack (EOA)

 is a 10 mS pulse with it’s rising edge at the end of the attack segment.

Half Power Point (HPP)

 is a 10 mS pulse with it’s rising edge occurring where the falling envelope passes the 5V (half 

power) point. It is similar to end of decay but offers somewhat more flexibility. For example it can occur during the decay 
segment or release segment.

End of Release (EOR)

 is a gate that goes low whenever the envelope ends.

Gate and Trigger Inputs:

 Only the Gate is actually needed. If a Trigger is input and the Gate is high, then the AD portion 

of the envelope will occur. Otherwise the envelope will rise to the Sustain Level only. The example below uses the Synth 
Tech Morphing Dual LFO to provide both the gate and trigger, with a variable phase lock. Thus the AD portion can be 
moved  anywhere  along  the  sustain  “base”.

Summary of Contents for Time Event Modulator EG3870

Page 1: ...ents Copyright Reproduction by any means including the Internet prohibited without permission This document contains proprietary and trade secret information of Blacet Research and is provided as a service to the module owner Any unauthorized duplication or transferral may violate trade secret laws Contents subject to change without notice Time Event Modulator VC DADSR ...

Page 2: ...lly control the ADSR segments The Delay section allows 0 to 10 seconds of delay before the envelope starts A wide variety of outputs include Full and Inverted envelopes as well as an attenuated envelope Two pulse signals EOA and HPP can be used to trigger external modules such as the Blacet EG2070 in AD mode or the DAD2970 The EOR gate output can also be used to control external modules ...

Page 3: ...not elapsed There are two responses of the Delay depending on if the gate is held active momentarily or throughout the delay period In the first case the delay will proceed automatically then trigger the AD cycle ending at the Sustain Level This will be held until the next Gate is applied and held as in case 2 Setting the Sustain level at 0 will give an AD style envelope In the second case the env...

Page 4: ...S pulse and activates LED2 EOR is simply the envelope output inverted by comparator U5a which is set to 50 mV by R33 and R34 The output level LED1 is driven by a voltage to current converter U5d which gives a more accurate visual display D1 is a shottky diode which clamps any negative excursions of all the envelopes to about 0 2V R11 Output Level and non inverting op amp U12c multiply the 5V nomin...

Page 5: ...of the board Be sure to follow directions Use the ref des column on the Parts List to locate components The Type and Value fields will often have the part marking in xx We advise inserting components in groups according to type checking them and then soldering the group This will help avoid errors Solder one leg of components first then come back and do the other leg later This practice avoids dis...

Page 6: ... first pushing a bit forward to get the rear pins in place Solder only the front pin while applying a bit of pressure to the PCB in the vicinity of the jack Do all the jacks and check the mounting before soldering any other pins Close one eye and sight down the row of jacks Each jack must be flush to the board and have no tilt from front to back When everything looks perfect solder the other pins ...

Page 7: ...with the longest leg next to the triangular PCB marking Solder ICs Use a static free work station or wrist strap when installing the ICs Observe correct orientation Install the ICs now as they will be less accessible once the PCBs are mounted to the front panel Make sure all the legs are straight and are actually going into the socket before seating the IC Front Panel Work on a soft towel to avoid...

Page 8: ...polarities and check for the possibility of a broken trace or a hairline short caused by under etching of the PCB especially around the pots If you encounter problems that you can t solve contact us preferably via e mail with a description of the problem Let us know what does and does not work We can then help you get your module working We can also fix modules mailed to us for a minimum fee of 29...

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