40 | 6. Tweaker Menu
Advanced Timing Configuration
tRDPRE
This item Holds DDR timing parameter tRDPRE. RD to PRE same bank minimum delay in DCLK
cycles. Supported Range is 6-15.
Options: Auto (Default)
tWRPRE
This item Holds DDR timing parameter tWRPRE. WR to PRE same bank minimum delay in tCK
cycles. Supported Range is 18-159.
Options: Auto (Default)
tXP
This item Holds DDR timing parameter txP. Power up to any command minmum delay in tCK
cycles Supported Range is 4-16.
Options: Auto (Default)
tXPDLL
This item Holds DDR timing parameter txP. Power up to RD / WR minmum delay in tCK cycles.
Applicable for DDR4 in case of exit from PPD when DRAM is configured to slow-exit mode.
Supported Range is 4-63.
Options: Auto (Default)
tPRPDEN
This item Holds DDR timing parameter tPRPDEN. PRE to power down minmum delay in tCK
cycles. Suported Range is 1-3.
Options: Auto (Default)
tRDPDEN
This item Holds DDR timing parameter tPRPDEN. RD to power down minmum delay in tCK
cycles. Supported Range is 4-95.
Options: Auto (Default)
tWRPDEN
This item Holds DDR timing parameter tPRPDEN. WR to power down minmum delay in tCK
cycles. Supported Range is 4-159.
Options: Auto (Default)
