P4M800-M7A BIOS Manual
17
PCI Master 0 WS Write
When enabled, writes to the PCI bus are executed with zero-wait states.
The Choices: Enabled
(default), Disabled.
PCI Delay Transaction
The chipset has an embedded 32-bit posted write buffer to support delay transactions
cycles. Select Enabled to support compliance with PCI specification.
The Choices: Enabled (default), Disabled.
Vlink mode selection
The Choices
:
By Auto
(default).
VLink 8X Support
This item allows you to enable or disable VLink 8X support.
The Choices: Enabled
(default), Disabled.
DRDY-Timing
The Choices:
default (default)
Memory Hole
When enabled, you can reserve an area of system memory for ISA adapter ROM. When
this area is reserved, it cannot be cached. Refer to the user documentation of the peripheral
you are installing for more information.
The Choices: Disabled
(default), 15M – 16M.
System BIOS Cacheable
Selecting the “Enabled” option allows caching of the system BIOS ROM at
F0000h-FFFFFh, which can improve system performance. However, any programs writing
to this area of memory will cause conflicts and result in system errors.
The Choices: Enabled
(default)
,
Disabled.
INIT DISPLAY FIRST
With systems that have multiple video cards, this option determines whether the primary
display uses a PCI Slot or an AGP Slot.
The Choices: PCI Slot
(default), AGP.