Chapter 2
32
BEM-100F series User’s Manual
Table 28 FP2 Front Panel 2 Pin Header
+
KLOCK
PLED
2
-
-
9
+
SMC
-
SMD
10
+
1
PWRBTN
Pin
Signal
Pin
Signal
1
Power LED +
2
Power
3
NC
4
Power Button -
5 Power
LED
- 6
NC
7
Keyboard Lock
8
SMBus Data
9 GND 10
SMBus
Clock
Pitch:2.54mm [YIMTEX 3362*05SANGR]
Table 29 LVDS1 Primary 24-bit, 1-channel LVDS Panel Connector
29
2
30
1
Signal Name
Pin
Pin
Signal Name
2
1
VDD_EN
4
3
+3.3V / +5V*
6
5
TxclkA-
8
7
10
9 GND
12
11
TxoutA0-
14
13
16
15
TxoutA1-
18
17
20
19
TxoutA2-
22
21
24
23
TxoutA3-
26
25
28
27 GND
30
29
DDC_Data
Pitch:1.25mm [HIROSE DF13-30DP-1.25(24)]
*
：
LVDS1 panel power can be selected by JP4.
