Figure 1-1 Internal Block Diagram
Microprocessor Bus
VRGB
(23:0)
RGBO
(23:0)
DVS,
DHS,
DEN,
DCLK
RxD, TxD
Interrupt
Controller
IRRCVR (1:0)
UART
Watchdog and
Timers
Processor ROM/
RAM Interface
CPUTMS,
CPUTCK,
CPUTDI
16-bit
Turbo
µ
P
PW181 Internal Block
Diagram
GPIO
PWM
IR
Decoders
OSD and CPU
SDRAM
Display
Timing
Generator
2-Wire
Serial
OSD
Control &
Blend
NMI
EXTINT
VCLK, VPEN,
VVS, VHS,
PortD(7:0)
PortE(7:0)
PortF(7:0)
Display Port
Color Matrix,
Gamma Correction
CLTs, Color Space
Expander
Image
Scaler
PortB
(7:0)
PortA
(7:0)
PortC
(7:0)
GRGB
(47:0)
GCLK, GFBK,
GPEN, GVS,
GHS, GSOG
OSD
Memory
Bus
OSD/CPU
Memory
Controller
RGBE
(23:0)
A(19:0),
D(15:0),
BHEN,
CS(1:0),
RD, WR
GCOAST,
GREF,
GBLKSPL,
GHSFOUT
CPUTDO
RAMWE,
RAMOE,
ROMWE,
ROMOE
Video
Deinterlace
Spatial
Noise
Reduction
CRISP
Image
Scaler
Horizontal
Image
Scaler
Me
mo
ry
Out
B
u
s
Me
mor
y In
Bu
s
Processor
Memory
Interface
SDRAM
Frame
Buffer
Frame
Buffer
Memory
Controller
MCLKEXT,
XI*
Dual PLL
Clock
Generator
MCLK DCLK UCLK
Master Reset
Reset
*For internal clock generator
DCLKEXT,
XO*
Video Port
Sync Decoder
Auto Image
Optimizer
Color Space
Converter HDCP
Graphics Port
Sync Decoder
Auto Image
Optimizer
Color Space
Converter HDCP
Field
Summary of Contents for P7
Page 1: ...P7 PDP TV SERVICE MANUAL ...
Page 58: ...6 Set Serial Label Information 8 MD 42HM8 SERIES ...
Page 82: ...MD 42HM8 SERIES 32 ...
Page 83: ...10 Block and Schematic Diagram 10 1 Schematic Diagram Notes MD 42HM8 SERIES 33 ...
Page 115: ...11 Replacement Parts List 11 1 Replacement Parts List Notes 65 MD 42HM8 SERIES ...