|
Technical
Reference
63
Bit
3:
Must
be
0
Bit
4:
Must
be
0
Bit
5:
Must
be
0
Bit
6:
Must
be
0
Bit
7:
Must
be
0
6
11
Line
Control
Register
(LCR)
Bit
0:
Word
Length
Select
Bit
0
(WLS0)
Bit
1:
Word
Length
Select
Bit
1
(WLS1)
WLS1
WLS0
Word
Length
0
0
5
Bits
0
1
6
Bits
1
0
7
Bits
1
1
8
Bits
Bit
2:
Number
of
Stop
Bit
(STB)
Bit
3:
Parity
Enable
(PEN)
Bit
4:
Even
Parity
Select
(EPS)
Bit
5:
Stick
Parity
Bit
6:
Set
Break
Bit
7:
Divisor
Latch
Access
Bit
(DLAB)
6
12
MODEM
Control
Register
(MCR)
Bit
0:
Data
Terminal
Ready
(DTR)
Bit
1:
Request
to
Send
(RTS)
Bit
2:
Out
1
(OUT
1)
Bit
3:
Out
2
(OUT
2)
Bit
4:
Loop
Bit
5:
Must
be
0
Bit
6:
Must
be
0
Bit
7:
Must
be
0