Access from the user program
KL2521
36
Version: 2.1
5.4.2
KL2521-0010 - Process data exchange
Control byte in process data exchange (REG=0)
Bit
7
6
5
4
3
2
1
0
Name
Reg_Access
0
SET_Z
SET_T
Cnt_Clr
Go_Counter
Ramp_Dis
Freq_Sel
Bit
Name
Description
Bit 7
Reg_Access
0
bin:
Register communication inactive (process data exchange)
Bit 5
SET_Z
Set output Z
Bit 4
SET_T
Set output T
Bit 3
Cnt_Clr
The counter value and eventually set overflow/underflow bits will be deleted by this bit This
can be done with edge control or level control (Feature.4).
Bit 2
Go_Counter
If travel distance control is active (Feature.9), then a pre-set counter value is approached
when the bit is set.
Bit 1
Ramp_Dis
The ramp function is disabled despite active Feature .5;
if the travel distance control is active it is aborted by this bit.
Bit 0
Freq_Sel
Fast toggling of the base frequency (only if ramp function is deactivated)
0: Base frequency 1 (registers 36 / 37)
1: Base frequency 2 (registers 38 / 39)
The change of the base frequency requires a reset for activation.
Status byte in process data exchange (REG=0)
The status byte is transferred from the terminal to the controller.
Bit
7
6
5
4
3
2
1
0
Name
Reg_Access
Error
Out_Z_ACK
Out_T_ACK
Overflow
Underflow
Ramp_Active Sel_Ack
Bit
Name
Description
Bit 7
Reg_Access
0
bin:
Acknowledgement for process data exchange
Bit 6
Error
General error bit, included with overflow/underflow
Bit 5
Out_Z_ACK
Output Z
Bit 4
Out_T_ACK
Output T
Bit 3
Overflow
This bit is set if the 16-bit counter overflows (65535 -> 0). It is reset when the counter ex-
ceeds one third of its measuring range (21845 -> 21846) or as soon as an underflow oc-
curs.
Bit 2
Underflow
This bit is set if the 16-bit counter underflows (0 -> 65535). It is reset when the counter
drops below two thirds of its measuring range (43690 -> 43689) or as soon as an overflow
occurs.
Bit 1
Ramp_Active
Ramp is currently being followed
Bit 0
Sel_Ack
Confirms the change of base frequency.
5.4.3
Register communication
Register access via process data exchange
•
Bit 7=1: Register mode
If bit 7 of the control byte is set, the first two bytes of the user data are not used for process data
exchange but written into the register set of the terminal or read from it.
•
Bit 6=0: read, bit 6=1: write
Bit 6 of the control bytes is used to specify whether a register should be read or written.
◦
Bit 6=0
: a register is read without changing it. The value can be found in the input process
image.
◦
Bit 6=1
: the user data are written to a register. The process is complete once the status byte in
the input process image has returned an acknowledgment (see example).
•
Bit 0 to 5: Address
The address of the register to be addressed is entered in bits 0 to 5 of the control byte.
Summary of Contents for KL2521 Series
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