BBK BBK921D, Service Manual

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ESS Technology, Inc. SAM0400-100401
ES6008/18/28/38 DATA SHEET
ES60X8 PIN DESCRIPTION
PRELIMINARY
ES60X8 PIN DESCRIPTION
Table 1 lists the identical pin descriptions for the ES6008,
ES6018, ES6028 and ES6038.
Table 1 ES60x8 Pin Description
Name Number I/O Definition
VEE 1,18, 27, 59, 68,
75, 92, 99, 104,
130, 148, 157,
159, 164, 183,
193, 201
I I/O power supply.
VSS 8, 17, 26, 34, 43,
52, 60, 67, 76,
84, 91, 98, 103,
112, 120, 129,
138, 147, 156,
163, 171, 177,
184, 192, 200,
208
I Ground.
LA[21:0] 23:19, 16:10,
7:2, 207:204
O Device address output.
VCC 9, 35, 44, 83,
121, 139, 172
I Core power supply.
RESET# 24 I Reset input, active low.
TDMDX
25
O TDM transmit data.
RSEL I ROM Select.
TDMDR 28 I TDM receive data.
TDMCLK 29 I TDM clock input.
TDMFS 30 I TDM frame sync.
TDMTSC# 31 O TDM output enable.
TWS
32
O Audio transmit frame sync.
SEL_PLL2 I System and DSCK output clock frequency selection is made at the rising edge of
RESET#. The matrix below lists the available clock frequencies and their respective
PLL bit settings.
TSD0
33
O Audio transmit serial data port 0.
SEL_PLL0 I Refer to the description and matrix for SEL_PLL2 pin 32.
TSD1
36
O Audio transmit serial data port 1.
SEL_PLL1 I Refer to the description and matrix for SEL_PLL2 pin 32.
TSD[2] 37 O Audio transmit serial data output 2.
TSD[3] 38 O Audio transmit serial data output 3.
RSEL Selection
0 16-bit ROM
1 8-bit ROM
SEL_PLL2 SEL_PLL1 SEL_PLL0 Clock Type
0 0 0 VCO off.
0 0 1 DCLK
0 1 0 Bypass mode
0 1 1 DCLK x 2
1 0 0 DCLK x 4.5
1 0 1 DCLK x 3
1 1 0 DCLK x 3.5z
1 1 1 DCLK x 4
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