20
Power amplifier (PA) PCB
The Power Amplifier raises the power from the exciter to specified output power. It also provides harmonic
filtering for the transmitter and low pass filtering in receive mode.
Gain control amp
The signal from the exciter at a level of approx. -17dBm is fed to a gain controlled amplifier, dual gate MOS
FET Q1. The stage gain is controlled by ALC. Transistor Q10 is configured as an emitter follower to provide
buffering, gain stage Q3 raises the signal level suitable to drive the first of two push pull power amplifiers.
This pre-driver stage employs RF negative feedback via TR3, R29 and C91 to achieve low distortion.
A push-pull drive stage comprising power MOS FETS Q4 and Q5 is employed to raise the power to a level
suitable to drive the 100W power amplifier stage. The MOS FETS each require a separate bias
potentiometer, RV3 for Q4 and RV4 for Q5. Final amplification to the output level is achieved using Q12
and Q13 in push-pull. This final amplifier stage has an active bias circuit using U3B and Q2 with D2
providing a bias reference which thermally tracks the power devices due to physical contact close to the
transistors
.
Relays
All of the relays in the transceiver with the exception of the PA power on - off relay RL9 are of the bi-stable
latching type. This means that they will stay operated in the SET or RESET state, even with the power
turned off until they are deliberately switched to the opposite state. They are all to be found on the PA
board. All of the relays are operated in a similar manner and an example of the operation of one relay is
given below.
Each relay has a SET and a RESET input and a common "NAME" input. For example relay RL10 has the
"NAME" of PRE AMP. To turn the pre-amp on, RL10 must be SET. Assume it starts off RESET. The
microprocessor causes the SET line, which is common to all relays to the high state (+12 volts). Then the
PRE AMP line on RL10 is put momentarily LOW. This action causes RL10 to be SET and select the RF pre
amp. Conversely, the amplifier can only be turned off or reset by taking the RESET line high and
momentarily taking the PRE AMP input low. Note that only the SET or RESET line can be taken high at
any one time, but multiple relays can be SET or RESET simultaneously
Low pass filters
Sub-octave harmonic filtering is provided by seven Cauer-Chebyshev filters with bands of 1.6 to 2.48 MHz,
2.48 to 3.84 MHz, 3.84 to 6.0 MHz, 6.0 to 9.3 MHz, 9.3 to 14.5 MHz, 14.5 to 22.48 MHz and 22.48 to 30.0
MHz. These are selected by seven bi-stable latching relays which each have one of seven filter select lines
FS1 to FS7, and common SET and reset lines. The microprocessor selects the correct filter in the manner
shown under the sub heading Relays above.
ALC control
Forward and reverse power sampling for the ALC system is implemented using current transformer TR6
and detector diodes D3 and D4. The forward and reflected voltages from the diodes (ALC1 and ALC2) are
buffered by OPAMPS U1A and U1B. Signals SWR+ and SWR- are processed by the microprocessor,
which determines attack and decay time constants, and forward power. The gain is set by the PWR ADJ
signal returned from the microprocessor. This controls the gate 2 voltage and thus the gain of MOSFET Q1.
Sometimes an external high power amplifier is connected to the transceiver. It will usually have its own
SWR Bridge and the DC voltage there from is fed to the microprocessor via pin 19 of the 26-way connector.
After processing this signal for attack and decay characteristics, the ALC signal is fed back into the PWR
ADJ line as previously mentioned.