AZZA 6IFA, Operation Manual

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PT-6IFA
SYSTEM BOARD
HARDWARE SETUP
2
There is no jumper needed for DRAM configuration, DRAMs' type and size will be
detected by system BIOS automatically.
In DRAM memory subsystem, ECC and Parity can be checked on the DRAM interface
(Functions selected by BIOS via CMOS setup, please refer to Chapter 5, the defult
status is parity selected.) All SIMMs and DIMM must be populated with
parity bit to
implement ECC or Parity functions.
ECC is an optional data integrity feature provided by the system. This feature provides
single-bit error correction, multiple-bit error detection, and detection of all errors
confined to single nibble for DRAM memory subsystem.
The SIMMs' operating voltage are :
SIMM1 - SIMM6 : + 5V DC
The usable DRAM modules are : (Note : S = Single-sided , D = Double-sided)
SIMMs : 1MB x 32(36)-S ( 4MB) ,
2MB x 32(36)-D ( 8MB) ,
4MB x 32(36)-S ( 16MB) ,
8MB x 32(36)-D ( 32MB) ,
16MB x 32(36)-S ( 64MB) ,
32MB x 32(36)-D (128MB) .
The following table is an example for DRAM memory installation, it contains several
modules combination, but not all combination.
Bank 0 Bank 1 Bank 2 Total
SIMM1, SIMM2 SIMM3, SIMM4 SIMM5, SIMM6 Size
4MB, 4MB 4MB, 4MB 4MB, 4MB 24 MB
8MB, 8MB 8MB, 8MB 8MB, 8MB 48 MB
16MB, 16MB 16MB, 16MB 16MB, 16MB 96 MB
32MB, 32MB 32MB, 32MB 32MB, 32MB 192 MB
64MB, 64MB 64MB, 64MB 64MB, 64MB 384 MB
128MB, 128MB 128MB, 128MB 128MB, 128MB 768 MB