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SBC81700 VIA V4 SBC User’s Manual
Phoenix-Award BIOS Utility
38
z
CPU & PCI Bus Control
Use this item to enable the immediate Write to PCI Bus, or disable
it for a later execution. Scroll to this item and press <Enter> to view
the sub menu CPU & PCI Bus Control.
¾
PCI Master 0 WS Write
When this item is enabled, the writes to the PCI bus will be
executed with zero wait state.
¾
PCI Delay Transaction
The chipset has an embedded 32-bit posted write buffer to
support delay transactions cycles. Select
“Enabled”
to
support compliance with PCI specification version 2.1.
Press <Esc> to return to the Advanced Chipset Features page.
z
System BIOS Cacheable
Use this item to enable or disable the system BIOS cache.
z
Video RAM Cacheable
Use this item to enable or disable the video RAM cache.
Summary of Contents for SBC817
Page 1: ...SBC81700 Series VIA V4 C7 Eden PICMG 1 0 Full Size Single Board Computer User s Manual...
Page 6: ...vi MEMO...
Page 11: ...SBC81700 VIA V4 SBC User s Manual Introduction 5 1 3 I O Bracket USB1 USB2 VGA Port LAN1 LAN2...
Page 13: ...SBC81700 VIA V4 SBC User s Manual Jumpers and Connectors 7 2 2 Board Layouts Component Side...
Page 62: ...SBC81700 VIA V4 SBC User s Manual Phoenix Award BIOS Utility 56 MEMO...
Page 66: ...SBC81700 VIA V4 SBC User s Manual PCI IRQ Routing 60 MEMO...