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IFO2225-873 Series User’s Manual
Watchdog Timer
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Appendix A
Watchdog Timer
A.1 About Watchdog Timer
Software stability is major issue in most application. Some embedded systems are not
watched by human for 24 hours. It is usually too slow to wait for someone to reboot when
computer hangs. The systems need to be able to reset automatically when things go wrong.
The watchdog timer gives us solution.
The watchdog timer is a counter that triggers a system reset when it counts down to zero from
a preset value. The software starts counter with an initial value and must reset it periodically. If
the counter ever reaches zero which means the software has crashed, the system will reboot.
A.2 How to Use Watchdog Timer
The following example enables configuration using debug tool.
Enable WDT (Watchdog Timer)
↓
Enable configuration:
-O 2E 87 ; Un-lock super I/O
-O 2E 87
↓
Select logic device:
-O 2E 07
-O 2F 08
↓
WDT device enable:
-O 2E 30
-O 2F 01
↓
Set timer unit:
-O 2E F0
-O 2F 00 ; (where 00: Sec; 08:Minute)
↓
Set base timer:
-O 2E F1
-O 2F 0A ; Set reset time (where 0A (hex) = 10sec)
Disable WDT (Watchdog Timer)
↓
Enable configuration:
-O 2E 87 ; Un-lock super I/O
-O 2E 87
↓
Select logic device:
-O 2E 07
-O 2F 08
↓
WDT device disable:
-O 2E 30
-O 2F 00
Summary of Contents for IFO2225-873 Series
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