WARNING: The output stage may be damaged if triggered by an external signal at a
pulse repetition frequency greater than 10 kHz.
GATING MODES
Triggering can be suppressed by a TTL-level signal on the rear-panel GATE connector.
The instrument can be set to stop triggering when this input high or low, using the front-
panel gate menu or the appropriate programming commands. This input acts
synchronously. When gated, the output will complete the full pulse width if the output is
high, and then stop triggering. No pulses are truncated.
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Summary of Contents for AVRF-4A-B
Page 34: ...PCB 158R4 LOW VOLTAGE POWER SUPPLY...
Page 35: ...PCB 284B HIGH VOLTAGE DISCHARGE BOARD...
Page 37: ...PCB 216E PRF PW TR ADJUST...
Page 38: ...PCB 231A DC BIAS SOURCE...
Page 44: ...PERFORMANCE CHECKSHEET 44...