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GATING MODES
Triggering can be suppressed by a TTL-level signal on the rear-panel GATE connector.
The instrument can be set to stop triggering when this input high or low, using the front-
panel gate menu or the appropriate programming commands. This input can also be
set to act synchronously or asynchronously. When set to asynchronous mode, the
GATE will disable the output immediately. Output pulses may be truncated. When set to
synchronous mode, the output will complete the full pulse width if the output is high,
and then stop triggering. No pulses are truncated in this mode.
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Summary of Contents for AVR-E3A-B
Page 33: ...WIRING DIAGRAMS WIRING OF AC POWER...
Page 34: ...PCB 158R5 LOW VOLTAGE POWER SUPPLY...
Page 35: ...PCB 235C HIGH VOLTAGE DC POWER SUPPLY...
Page 36: ...PCB 231A DC OFFSET SOURCE...
Page 37: ...PCB 217B RELAY DRIVER...
Page 38: ...PCB 104G KEYPAD DISPLAY BOARD...
Page 40: ...PERFORMANCE CHECKSHEET 40...