VUNREG
IC14
VCC (+5V)
P4
P1
P2
P5
P3
P6
0V
VHELD
VUNREG
BUZZER
W'DOG
IC4
DATA Rx
DATA Tx
ST_EN
RESET
WATCHDOG
BUZZCONTROL
POWER FAIL
REGULATOR
+12V
D2603-1
MICROPROCESSOR
IC13
D5
D6
D4
ASIC
RESET
R-C
TIMING
TO ASIC IC4
3
2
1
4
5
6
CONNECTOR LOCATION
VIEWED FROM BACK OF
INSTRUMENT (OUTSIDE)
VEL
D7
0V EL
TO EL PANEL
DRIVERS
VHELD
TO EL PANEL
DRIVERS
V1
RESET
SCAN
EL
EL1
EL2
PL8
PL7
TO ELECTRO-
LUMINESCENT
PANEL
0V
SeaTalk
DATA
XL1
16MHz
+12V
0V
SeaTalk
DATA
SW1
SW2
SW3
SW4
XTAL
P8.2
P9.2
P9.0
P6.2
P8.1
P9.4
P6.1
P8.0
PC.0
PC.1
PC.6
PC.2
PC.7
PA.2
BUZZER
BZ1
TR20
VEL
0VEL
TR23
TR7
TR23
TR7
N/C
T3
L6
C37
+
LCD CONTRAST V1 - V6
COL129
to
COL192
COL193
to
COL256
COL65
to
COL128
COL1
to
COL64
VCC
NEGATIVE VOLTAGE
GENERATOR
CURRENT AMP &
INTEGRATOR
TR3
TR12
C8
IC16
VUNREG
LCD
PA.4
PA.7
P4.0
to
P4.7
IC2
IC15
FLASH
MEMORY
RAM
DATA
D0 - D7
ROM 5V
RAM 5V
TR18
TR17
B1
3V
LITHIUM
TR11
TR13
TR10
TR19
B_SENSE
B_LEVEL
VCC
RES
OE
WE
CE
Vcc
OE
WE
CE
Vcc
CE2
A0
to
A18
RD
HWR
P8.3
P8.4
D8
to
D15
RES
P7.3
P6.8
RD
HWR
P8.4
A0 - A18
RD
HWR
P8.3
A0 - A16
DISPLAY
TR5
TR6
LED2 LED1
LED4 LED3
LED6 LED5
LED8 LED7
PA.6
V1-4
RST
D/L
R/W
CS3
DB0-7
CLK1
CLK2
M
FRM
CL2
V1-4
RST
D/L
R/W
CS3
DB0-7
CLK1
CLK2
M
FRM
CL2
V1-4
RST
D/L
R/W
CS3
DB0-7
CLK1
CLK2
M
FRM
CL2
V1-4
RST
D/L
R/W
CS3
DB0-7
CLK1
CLK2
M
FRM
CL2
CLK1
CLK2
M
FRM
CL2
ROW1
to
ROW64
LCD DRIVER
LCD DRIVER
LCD DRIVER
LCD DRIVER
LCD DRIVER
V5
V4
V3
V6
IC10
R22
R27
V1
V2
V5
V6
P8.5
PA.0
P9.5
P8.4
PA.3
D_RES
R/W
CS3B
CS3D
L0-7
PA.5
CS3C
CS3C
D/L
CS3A
V1-4
D_RES
D/L
R/W
L0-7
CLK1
CLK2
M
FRM
CL2
V1-4
D_RES
D/L
R/W
L0-7
CLK1
CLK2
M
FRM
CL2
V1-4
D_RES
D/L
R/W
L0-7
CLK1
CLK2
M
FRM
CL2
V1-4
D_RES
D/L
R/W
L0-7
CLK1
CLK2
M
FRM
CL2
CS3D
CS3B
CS3A
VUNREG
VEE
VEE
IC5
VEE
IC6
VEE
IC7
VEE
IC8
VEE
IC9
V1
V2
V5
V6
CONTRAST
d
c
b
+
a
+
+
+
R17
R18
R19
R20
R21
V2
V1
Figure 3 Block Diagram
Signal flow is left to right except where indicated.
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ST80 Masterview
16 Masterview Service Manual 83028_1
Summary of Contents for Masterview ST80
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