Atmel SAM4S-EK2 User Manual Download Page 42

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SOCKET_THROUGHT_HOLE

NOT POPULATED

LQFP100

PB2

PB3

PB10

PB11

PB4
PB6
PB7
PB5

NRST

PB1

PA0
PA1
PA2
PA3
PA4
PA5
PA6

PA9
PA10
PA11
PA12
PA13
PA14
PA15
PA16
PA17
PA18
PA19
PA20
PA21
PA22
PA23
PA24
PA25
PA26
PA27
PA28
PA29
PA30
PA31

PC0

PC1

PC2

PC3

PC4

PC5

PC6

PC7

PC8

PC9

PC10

PC11

PC12

PC13

PC14

PC15

PC16

PC17

PC18

PC19

PC20

PC21

PC22

PC23

PC24

PC25

PC26

PC27

PC28

PC29

PC30

PC31

XOUT32

PB0

JTAGSEL

XIN32

PB14

PC12

PA23

PC23
PB11

PC24

PC22

PB12

PB10

PA19

PC15

PC13

PA22

PC18
JTAGSEL
PB5

PC20

PB6

PC19

PC21
PB7

PA18

PA21

PC26

PA17

PC27

PB3

PB2

PC31

PB0

ADVREF

PC29

PC30

PB1

PA25
PA26
PC3

PA24

PC4

PC5

PA12

XIN32

XOUT32

PC2

PA11

PA9
PC1

PA10

PA16
PC7

PC6

PA14

PA15

PA13

PC28

PA5

PA4

PA27

PC8

NRST

PA28

PA30

PA3

PC10

PA29

TEST

PC9

PC16

PC11

PA2

PC14

PA1

PA0

PC17

PB4

PA6

PC0

XIN

PA20

PC25
PB13

XOUT

PA31

PB0

PB6
PB7

PB9

PB8

PB10
PB11

PB1
PB2

PB12

PB3

PB14

PB13

PB4
PB5

PB13

PB14

PB12

ADVREF

TEST

XIN32
XOUT32

PA7
PA8

XIN

XOUT

PB8

PB9

PB13

PB14

VDDCORE

DGND

VDDIO

DGND

VDDPLL

VDDCORE

DGND

VDDIN

VDDOUT

DGND

VDDOUT

VDDIN

VDDIO

VDDCORE

VDDIO

VDDCORE

VDDIO

VDDCORE

VDDIO

VDDPLL

DGND

VDDOUT

DGND

VDDPLL

VDDCORE

VDDIO

VDDIN

+3V3

DGND

+3V3

DGND

VCC33

+5V

DGND

PB2

PB3

PB10

PB11

PB5

PB7

PB6

PB4

NRST

PB1

PA[0..31]

PC[0..31]

PB[0..14]

PB0

REV

DATE

MODIF.

DES.

DATE

VER.

SCALE

1/1

REV.

SHEET

This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.

INIT EDIT

XX-XXX-XX

XXX

Microcontroller

30-APR-12

SAM4S-EK2

REV

DATE

MODIF.

DES.

DATE

VER.

SCALE

1/1

REV.

SHEET

This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.

INIT EDIT

XX-XXX-XX

XXX

Microcontroller

30-APR-12

SAM4S-EK2

REV

DATE

MODIF.

DES.

DATE

VER.

SCALE

1/1

REV.

SHEET

This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.

INIT EDIT

XX-XXX-XX

XXX

Microcontroller

30-APR-12

SAM4S-EK2

TP1

0R nm

DNP

R10

0R nm

DNP

100nF

JP7

Header2

2.2uF

C70
4.7uF

100nF

C3
20pF

100nF

10uH-100mA

JP3

R107
0R

100nF

.7uF

R11
0R

TP2

4.7uF

DNP

C24
10uF

Y3
32.768KHz

0R nm

DNP

TP3

R13
2.2K

100nF

J2
Socket-QFP100

DNP

26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50

100

JP4

Header2 nm

DNP

20pF

100nF

JP2

R12

JP1
Header2 nm

DNP

MN2

LM4040AIM3X-3.0

100nF

C4
20pF

.7uF

R14
1R

0R nm

DNP

20pF

JP8

Header2

100nF

JP5

Header2

0R nm

DNP

100nF

R2
49.9R 1%

0R nm

DNP

100nF

C22
100nF

J1
SMA nm

DNP

3
5

ATSAM4SD32-LQFP100

MN1
AT91SAM4SD32-LQFP100

PA0_PWMH0_TIOA0_A17

PA1_PWMH1_TIOB0_A18

PA2_PWMH2_SCK0_DATRG

PA3_TWD0_NPCS3

PA4_TWCK0_TCLK0

PA5_RXD0_NPCS3

PA6_TXD0_PCKO

PA7_RTS0_PWMH3

PA8_CTS0_AD12BTRG

PA9_URXD0_NPCS1

PA10_UTXD0_NPCS2

PA11_NPCS0_PWMH0

PA12_MISO_PWMH1

PA13_MOSI_PWMH2

PA14_SPCK_PWMH3

PA15_TF_TIOA1_PWML3

PA16_TK_TIOB1_PWML2

PA17_TD_PCK1_PWMH3_AD12B0

PA18_RD_PCK2_A14_AD12B1

PA19_RK_PWML0_A15_AD12B2

PA20_RF_PWML1_A16_AD12B3

PA21_RXD1_PCK1_AD12B8

PA22_TXD1_NPCS3_NCS2_AD12B9

PA23_SCK1_PWMH0_A19

DDCORE

JTAGSEL

GND

DDI

PB8_XOUT

PB9_XIN

PB0_PWMH0_AD12B4

NRST

DDCORE

ADVREF

PA25_CTS1_PWMH2_A23

PA24_RTS1_PWMH1_A20

PB2_URXD1_NPCS2_AD12B6

PB3_UTXD1_PCK2_AD12B7

PB6_TMS_SWDIO

PB4_TWD1_PWMH2_TDI

PB5_TWCK1_PWML0_TDO

PB7_TCK_SWCLK

TEST

PB12_PWML1_ERASE

PB14_NPCS1_PWMH3_DACO1

DDOUT

PB1_PWMH1_AD12B5

PA26_DCD1_TIOA2_MCDA2

PA27_DTR1_TIOB2_MCDA3

PA28_DSR1_TCLK1_MCCDA

PA29_RI1_TCLK2_MCCK

PA30_PWML2_NPCS2_MCDA0

PA31_NPCS1_PCK2_MCDA1

DDI

PB10_DDM

PB11_DDP

PB13_PWML2_PCK0_DACO0

DDI

DDCORE

DDP

100

DDI

GNDANA

0_D0_P

WML0

1_D1_P

WML1

2_D2_P

WML2

3_D3_P

WML3

4_D4_NP

5_D5

6_D6

7_D7

8_NWR0_NWE

9_NA

NDOE

10_NA

NDWE

11_NRD

12_NCS

3_A

D12B

13_NWA

WML0_A

D12B

14_NCS

15_NCS

WML1_A

D12B

16_A

21_NA

NDA

17_A

22_NA

NDCLE

18_A

0_NB

0_P

WMH0

19_A

1_P

WMH1

20_A

2_P

WMH2

21_A

3_P

WMH3

22_A

4_P

WML3

23_A

5_TI

24_A

6_TI

25_A

7_TCLK

26_A

8_TI

27_A

9_TI

28_A

10_TCLK

29_A

11_TI

5_A

D12B

30_A

12_TI

5_A

D12B

31_A

13_TCLK

5_A

D12B

100nF

DNP

0R nm

DNP

C23
4.7uF

TP4

12MHz

JP6

Header2

100nF

Summary of Contents for SAM4S-EK2

Page 1: ...11176A ATARM 24 Sep 12 SAM4S EK2 User Guide...

Page 2: ...and Technical Support 3 2 Section 4 Evaluation Kit Hardware 4 1 4 1 Board Overview 4 1 4 2 Features List 4 2 4 3 Function Blocks 4 2 4 3 1 Processor 4 2 4 3 2 Memory 4 2 4 3 3 Clock Circuitry 4 3 4 3...

Page 3: ...J15 4 23 4 5 5 TFT LCD Connector J8 4 23 4 5 6 JTAG Debugging Connector J6 4 25 4 5 7 SD MMC MCI Connector J3 4 26 4 5 8 Analog Connector CN1 CN2 4 27 4 5 9 RS485 Connector J14 4 27 4 5 10 Headphone...

Page 4: ...icable documents acronyms and abbreviations Section 2 describes the kit contents its main features and specifications Section 3 provides instructions to power up the SAM4S EK2 and describes how to use...

Page 5: ...owing items Board a SAM4S EK2 board a universal input AC DC power supply with US Europe and UK plug adapters Cables one USB cable one serial RS232 cable A Welcome Letter Figure 2 1 Unpacked SAM4S EK2...

Page 6: ...The SAM4S EK2 board is shipped in a protective anti static bag The board must not be subjected to high electrostatic potentials A grounding strap or similar protective device should be worn when han d...

Page 7: ...the power supply Connect the power supply DC connector to the board and plug the power supply to an AC power plug The board LCD should light up and display a welcome page Then click or touch the icons...

Page 8: ...stem level con cepts such as power distribution memory and interface assignments The SAM4S EK2 board is based on the integration of an ARM Cortex M4 processor with on board NAND Flash and a set of pop...

Page 9: ...one jack output SD MMC interface Reset button NRST User buttons Left and Right QTouch buttons Up Down Left Right Valid and Slider Full Speed USB device port JTAG ICE port On board power regulation Two...

Page 10: ...C26 46 N C25 45 I O7 44 I O6 43 I O5 42 I O4 41 N C24 40 N C28 48 M T29F2G 08ABAEA JP9 Header2 C28 100nF NA NDFLASH PC18 C29 1uF 3V3 PC14 DGND R16 47K R22 0R DNP R21 47K R19 0R DGND 3V3 C27 100nF PC7...

Page 11: ...to check for these device s datasheets about reset duration requirements Then you need to set an appropriate configuration in the NRST Manager This is done through the ERSTL field in the RSTC_MR regis...

Page 12: ...mitter USART provides one full duplex uni versal synchronous asynchronous serial link The data frame format is extensively configurable data length parity number of stop bits to support a broad range...

Page 13: ...with touch panel FTM280C34D Its inte grated driver IC is ILI9325 The LCD display area is 2 8 inches diagonally measured with a native resolution of 240 x 320 dots DGND DGND 3V3 J5 5 4 3 2 1 9 8 7 6 1...

Page 14: ...hield PC11 R63 4 7K DNP DGND LED_A PC26 LCD_DB2 NRST PC8 LCD_DB0 PC27 LCD C45 100nF LCD_DB4 DGND J8 FH26 39S 0 3SHW VDD 1 DB17 2 DB16 3 DB15 4 DB14 5 DB13 6 DB12 7 DB11 8 DB10 9 DB9 10 DB8 11 DB7 12 D...

Page 15: ...R67 and R69 On ZigBEE side R117 and R120 For further information refer to the Schematics section Touch ADC auxiliary inputs IN3 IN4 of the ADS7843 are connected to test points TP8 TP9 for optional fun...

Page 16: ...must be set or removed at the same time By modifying the jumper positions you can select each of the following gain values 20 dB default setting both JP14 and JP15 are off 26 dB both JP14 and JP15 ar...

Page 17: ...der2 C72 1nF AGND AGND VCC33 C69 1nF AGND R77 470R PB0 R86 47K AGND MIC1 SVB6050 1 2 MN11 TS922 IN1 2 IN1 3 OUT2 7 IN2 6 IN2 5 GND 4 VCC 8 OUT1 1 FB2 BN03K314S300R AVDD R79 1K JP14 Header2 R87 47K R81...

Page 18: ...or USB device Both 27 Ohm resistors R114 and R116 build up a 90 Ohm differential impedance together with the embedded 6 Ohm output impedance of the SAM4SD32 full speed channel drivers R110 and R112 bu...

Page 19: ...2 3 Analog Output The BNC connector CN2 is connected to the DAC port PB13 and provides an external analog output An on board 50 Ohm resistor termination can be enabled by closing jumper JP21 A filter...

Page 20: ...buttons on the SAM4S EK2 which are connected to PIO lines and defined to be left and right buttons by default In addition a mechanical button controls the system reset signal NRST Figure 4 20 System...

Page 21: ...nterface which is connected to a 4 bit SD MMC micro card slot featuring a card detection switch Figure 4 22 SD Card 4 3 17 ZigBEE SAM4S EK2 has a 10 pin male connector for the RZ600 ZigBEE module Note...

Page 22: ...C95 18pF C96 2 2nF C97 2 2uF PA16 ZB_RSTN PA14 PA12 PB2 JP27 Header2 R120 0R DGND 3V3 PA17 PA18 ZIGBEE R121 0R PA15 5V PA18 3V3 JP23 1 2 3 JP24 1 2 3 PA19 5V 5V 3V3 3V3 3V3 PIOA 3V3 PA20 DGND JP22 1...

Page 23: ...CTS0 AD12BTR G WKUP5 XOUT32 CLK32KHz 10 PA9 URXD0 NPCS1 PWMFI0 WKUP6 UART receive data 11 PA10 UTXD0 NPCS2 UART transmit data 12 PA11 NPCS0 PWMH0 WKUP7 NPCS0 TSC 13 PA12 MISO PWMH1 MISO_TSC ZigBEE MIS...

Page 24: ...8 PB7 TCK SWCLK JTAG clock 9 PB8 XOUT CLK12MHz 10 PB9 XIN CLK12MHz 11 PB10 DDM USB DM 12 PB11 DDP USB DP 13 PB12 PWML1 ERASE Flash erase selector 14 PB13 PWML2 PCK0 DAC0 Audio Output R 15 PB14 NPCS1...

Page 25: ...22 PC21 A3 PWMH3 USB Vbus detection 23 PC22 A4 PWML3 QTouch valid button SNS 24 PC23 A5 TIOA3 QTouch valid button SNSK 25 PC24 A6 TIOB3 QTouch up button SNS 26 PC25 A7 TCLK3 QTouch up button SNSK 27...

Page 26: ...dance for RS485 interface JP11 RS485 CLOSE Maintain impedance matching for RS485 interface JP12 RS485 OPEN Maintain differential impedance for RS485 interface JP13 CS CLOSE NCS1 chip select LCD JP14 J...

Page 27: ...r example This feature gives the user an added level of versatility for prototyping a system of his own See the table below Table 4 5 Audio Input Configuration JP17 JP19 MONO STEREO INPUT OFF OFF PIN...

Page 28: ...P4 C13 J2 External clock resource input Backup 12 MHz crystal Isolation between 12 MHZ clock source and GPIO line Isolation between 32 kHz clock source and GPIO line JTAGSEL and TEST selector Coupling...

Page 29: ...ith RTS CTS Handshake Support Figure 4 26 Male RS232 USART Connector J5 Table 4 9 Power Supply Connector J9 Signal Descriptions Pin Mnemonic Signal Description 1 Center 5 VCC 2 Gnd Ground reference Ta...

Page 30: ...rd to connect the LCD module backlight and touch screen Figure 4 29 LCD Connector J8 Table 4 11 Male RS232 UART Connector J7 Signal Descriptions Pin Mnemonic Signal Description 1 4 6 7 8 9 NC NO CONNE...

Page 31: ...LCD_DB14 PC4 6 LCD_DB13 PC3 7 LCD_DB12 PC2 8 LCD_DB11 PC1 9 LCD_DB10 PC0 10 LCD_DB09 NC 11 LCD_DB08 NC 12 LCD_DB07 13 LCD_DB06 NC 14 LCD_DB05 NC 15 LCD_DB04 NC 16 LCD_DB03 NC 17 LCD_DB02 NC 18 LCD_DB0...

Page 32: ...connection 4 GND Common ground 5 TDI TEST DATA INPUT Serial data output line sampled on the rising edge of the TCK signal JTAG data input of target CPU It is recommended that this pin is pulled to a d...

Page 33: ...GND Common ground 17 RFU This pin is not connected in SAM ICE 18 GND Common ground 19 RFU This pin is not connected in SAM ICE 20 GND Common ground Table 4 14 JTAG ICE Connector J6 Signal Description...

Page 34: ...ottom View 4 5 9 RS485 Connector J14 Figure 4 33 RS485 Connector J14 Table 4 16 Analog Input Output Connector CN1 CN2 Signal Descriptions Pin Mnemonic 1 2 3 4 GND 5 Analog input PB1 for CN1 and analog...

Page 35: ...19 Connector J16 Signal Descriptions Function Signal Name Port Pin Pin Port Signal Name Function Option on Misc Port Set by Zero Ohm Resistor or Solder Shunts Reset RST 1 2 Misc EEPROM for MAC address...

Page 36: ...ble 4 20 Connector J12 Signal Descriptions Pin Mnemonic Pin Mnemonic 1 5V or 3 3V 2 5V or 3 3V 3 GND 4 GND 5 PC0 6 PC16 7 PC1 8 PC17 9 PC2 10 PC18 11 PC3 12 PC19 13 PC4 14 PC20 15 PC5 16 PC21 17 PC6 1...

Page 37: ...1 Connector J13 Signal Descriptions Pin Mnemonic Pin Mnemonic 1 5V or 3 3V 2 5V or 3 3V 3 GND 4 GND 5 NC 6 PA16 7 NC 8 PA17 9 NC 10 PA18 11 NC 12 PA19 13 NC 14 PA20 15 NC 16 PA21 17 PA6 18 PA22 19 PA7...

Page 38: ...onnector J14 Figure 4 38 PIO Expansion Connector J14 Table 4 22 Connector J14 Signal Descriptions Pin Mnemonic Pin Mnemonic 1 5V or 3 3V 2 5V or 3 3V 3 GND 4 GND 5 PB0 6 PB8 7 PB1 8 PB9 9 PB2 10 PB10...

Page 39: ...11176A ATARM 24 Sep 12 Section 5 Schematics 5 1 Schematics This section contains the following schematics Block Diagram Board Configuration Microcontroller NAND Flash Serial IF TFT LCD QTouch Audio Po...

Page 40: ...s agreement is our property Reproduction and publication without our written authorization shall expose offender to legal proceedings INIT EDIT A 1 7 A XX XXX XX PP XXX Block Diagram 30 APR 12 SAM4S E...

Page 41: ...PC8 PC9 PC10 PC11 PC12 PC13 PC14 PC15 PIOC USAGE PC16 PC17 PC18 PC19 PC20 PC21 PC22 PC23 PC24 PC25 PC27 PC28 PC29 PC26 PC30 PC31 PIOC USAGE D0 WR_LCD RD_LCD USER_PB2 EN_LCD NAND_NCS0 NSC1_LCD REGSEL_...

Page 42: ...F J2 Socket QFP100 DNP 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62...

Page 43: ...HE10 20PTS VTref 1 Vsupply 2 nTRST 3 GND1 4 TDI 5 GND2 6 TMS 7 GND3 8 TCK 9 GND4 10 RTCK 11 GND5 12 TDO 13 GND6 14 nSRST 15 GND7 16 DBGRQ 17 GND8 18 DBGACK 19 GND9 20 C36 100nF C39 100nF R18 10K R34 0...

Page 44: ...orization shall expose offender to legal proceedings INIT EDIT A 5 7 A XX XXX XX PP XXX TFT LCD QTouch 30 APR 12 SAM4S EK2 REV DATE MODIF DES DATE VER SCALE 1 1 REV SHEET This agreement is our propert...

Page 45: ...wer supply 30 APR 12 SAM4S EK2 MN11 TS922 IN1 2 IN1 3 OUT2 7 IN2 6 IN2 5 GND 4 VCC 8 OUT1 1 C80 10uF JP20 Header2 C64 100nF R83 0R R93 100K R106 0R C72 1nF JP19 Header2 C76 100nF VR1 10K VR 1 3 2 C73...

Page 46: ...TE VER SCALE 1 1 REV SHEET This agreement is our property Reproduction and publication without our written authorization shall expose offender to legal proceedings INIT EDIT A 7 7 A XX XXX XX PP XXX U...

Page 47: ...Board Recovery Closing JP3 and powering the board will assert ERASE and clear GPNVM bit 1 and thereby select the boot from the ROM by default The MCU will boot from the internal ROM to enable a SAM BA...

Page 48: ...SAM4S EK2 User Guide 7 1 11176A ATARM 24 Sep 12 Section 7 Revision History 7 1 Revision History Table 7 1 Document Comments Change Request Ref 11176A Initial version...

Page 49: ...MERCHANTABILITY FITNESS FOR A PARTICULAR PURPOSE OR NON INFRINGEMENT IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT INDIRECT CONSEQUENTIAL PUNITIVE SPECIAL OR INCIDEN TAL DAMAGES INCLUDING WITHOUT...

Page 50: ...Mouser Electronics Authorized Distributor Click to View Pricing Inventory Delivery Lifecycle Information Atmel ATSAM4S EK2...

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