Atmel ICE50, User Manual

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General Description
3-12 ICE50 User Guide
2523A–AVR–11/02
3.5.2 Digital I/O The Digital IO ports of the ICE50 are realized as shown in Figure 3-17 using CMOS buff-
ers and voltage converters.
Figure 3-17. Digital I/O
The propagation delay of the IO ports are larger for the ICE50 than for the actual emu-
lated part. The diagram below shows the timing data for driving out and reading in a
signal on the IO ports of the Emulator. The data direction register is assumed set to “1”
in Figure 3-18. Table 3-3 shows typical data.
Figure 3-18. Data Direction Register
PULLUP (DDRxy & PORTxy)
DDRxy
PORTxy
PINxy
PINKEEPx
V
CC
330K
36K
Pxy
V
CC
Emulator
V
CC
Target
LEVEL CONVERTER
DIGITAL I/O
t
ILH
PORTxy
Pxy
t
OHL
t
IHL
t
OLH
PINxy